EPM9480RC208-15 vs EPM9480RC208-20 Comparison
Detailed side-by-side comparison of EPM9480RC208-15 by Intel and EPM9480RC208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9480RC208-15 | EPM9480RC208-20 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Family | MAX 9000 | MAX 9000 |
| Logic Cells / Macro Cells | 480 macro cells | — |
| Usable Gates | 10,000 gates | 12,000 |
| Maximum Operating Frequency | 117.6 MHz | 117.6 MHz |
| Propagation Delay (tPD) | 15 ns | — |
| User I/O Pins | 153 | — |
| Supply Voltage | 5.0 V | 5 V |
| Programmability | In-System (ISP) via JTAG IEEE 1149.1 | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| Package | RQFP-208 | 208-pin RQFP (Plastic Quad Flat Pack) |
| Operating Temperature | -40C to +85C (commercial) | [DATA_NEEDED: operating temperature grade] |
| Mounting Type | Surface Mount | Surface Mount |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | — |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS compliance] |
| MSL Level | [DATA_NEEDED: MSL rating] | — |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Delay | — | 20 ns |
| Technology | — | CMOS EEPROM (non-volatile) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ByteBlaster |
| I/O Pins | — | [DATA_NEEDED: user I/O count] |