EPM9560ARI208-10N vs EPM9560ARC208-10N Comparison
Detailed side-by-side comparison of EPM9560ARI208-10N by Altera and EPM9560ARC208-10N by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560ARI208-10N - MAX 9000 CPLD 12K Gates 560 Macrocells | Altera
EPM9560ARI208-10N ObsoleteSpecification Comparison
| Parameter | EPM9560ARI208-10N | EPM9560ARC208-10N |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 20 |
| Maximum User I/O Pins | 212 | — |
| Flip-Flops | 484 | — |
| Propagation Delay (tPD1) | 10 ns | — |
| Clock-to-Output (tCO) | 4.5 ns | — |
| Setup Time (tSU) | 3.0 ns | — |
| Maximum Counter Frequency (fCNT) | 144.9 MHz | — |
| Supply Voltage | 5.0 V | 5 V |
| Logic Family | CMOS EEPROM | — |
| Programming Interface | JTAG (IEEE 1149.1) - In-System Programmable | — |
| Package | 208-pin RQFP (Plastic) | 208-pin RQFP (PowerQuad II) |
| Operating Temperature | 0 C to 70 C (Commercial) | 0 C to +70 C (commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| User I/O Pins | — | 153 |
| Pin-to-Pin Delay | — | 10 ns |
| Internal Counter Frequency | — | 144.9 MHz |
| Technology | — | CMOS EEPROM |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes (JTAG ISP) |
| Speed Grade | — | -10 |
| RoHS Status | — | Compliant (N suffix) |
| Lead Finish | — | [DATA_NEEDED: lead finish] |
| MSL Level | — | [DATA_NEEDED: MSL level] |