EPM9560ARI240-10N vs EPM9560ARI240-10 Comparison

Detailed side-by-side comparison of EPM9560ARI240-10N by Intel and EPM9560ARI240-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560ARI240-10N EPM9560ARI240-10
Brand Intel Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Nrnd Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $105.00 $0.00
Family MAX 9000 MAX 9000
Product Type CPLD (Complex Programmable Logic Device) β€”
Usable Gates 12,000 12,000
Macrocells 560 β€”
Logic Array Blocks (LABs) 16 β€”
User I/Os 216 (per digchip); 191 (per Mouser) β€”
Maximum Internal Frequency 144.9 MHz (typical); 145 MHz (per digchip) β€”
Propagation Delay (tPD) 10 ns (-10 speed grade) β€”
Supply Voltage 5.0 V nominal (4.5 V min, 5.5 V max) 5.0 V
Logic Family CMOS, EEPROM-based β€”
In-System Programmability Yes (5.0 V ISP via JTAG) β€”
Package 240-pin RQFP (RQFP-240 / PQFP-240) 240-pin RQFP (PowerQuad Flat Pack)
Mounting Type Surface Mount Surface Mount
Operating Temperature -40C to +85C (industrial) β€”
Architecture Multiple Array MatriX (MAX) - 3rd generation β€”
JTAG (IEEE 1149.1) Yes β€”
Lead-Free / RoHS [DATA_NEEDED: lead-free / RoHS status not in provided data] β€”
Device Type β€” CPLD (Complex Programmable Logic Device)
Macro Cells β€” 560
User I/O Pins β€” 191
Pin-to-Pin Propagation Delay β€” 10 ns
Internal Frequency β€” 144.9 MHz
Technology β€” CMOS, EEPROM-based configuration
Operating Temperature Range β€” -40 C to +85 C (industrial)
Configuration Memory β€” EEPROM (non-volatile, instant-on)
Logic Architecture β€” Multiple Array MatriX (MAX) with global interconnect array
RoHS Status β€” [DATA_NEEDED: RoHS status]
Moisture Sensitivity Level β€” [DATA_NEEDED: MSL level]
Number of Terminals β€” 240
Terminal Form β€” Gull Wing

Datasheets & Resources

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