EPM9560ARI240-10N vs EPM9560RI240-10 Comparison
Detailed side-by-side comparison of EPM9560ARI240-10N by Intel and EPM9560RI240-10 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560ARI240-10N - MAX 9000 CPLD, 560 Macrocells, 5V, 240-RQFP | Intel
EPM9560ARI240-10N NrndSpecification Comparison
| Parameter | EPM9560ARI240-10N | EPM9560RI240-10 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Product Type | CPLD (Complex Programmable Logic Device) | — |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 16 | — |
| User I/Os | 216 (per digchip); 191 (per Mouser) | 240 pins |
| Maximum Internal Frequency | 144.9 MHz (typical); 145 MHz (per digchip) | 144.9 MHz |
| Propagation Delay (tPD) | 10 ns (-10 speed grade) | 10 ns (speed grade -10) |
| Supply Voltage | 5.0 V nominal (4.5 V min, 5.5 V max) | — |
| Logic Family | CMOS, EEPROM-based | — |
| In-System Programmability | Yes (5.0 V ISP via JTAG) | — |
| Package | 240-pin RQFP (RQFP-240 / PQFP-240) | RQFP-240 (Power Quad Flat Pack) |
| Mounting Type | Surface Mount | — |
| Operating Temperature | -40C to +85C (industrial) | [DATA_NEEDED: operating temperature range] |
| Architecture | Multiple Array MatriX (MAX) - 3rd generation | — |
| JTAG (IEEE 1149.1) | Yes | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free / RoHS status not in provided data] | — |
| Device | — | EPM9560 |
| Logic Elements / Macrocells | — | 560 macrocells |
| Supply Voltage (VCC) | — | 5.0 V |
| Technology | — | CMOS, EEPROM-based |
| Programming Interface | — | JTAG (IEEE 1149.1) + ByteBlaster |
| Non-Volatile Memory | — | Yes (EEPROM) |
| In-System Programmable | — | Yes |
| RoHS Status | — | [DATA_NEEDED: RoHS compliance status] |