EPM9560GC280-15N vs EPM9480RC240-15 Comparison
Detailed side-by-side comparison of EPM9560GC280-15N by Intel and EPM9480RC240-15 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560GC280-15N | EPM9480RC240-15 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Device Family | MAX 9000 | MAX 9000 |
| Product Type | EE PLD / CPLD | — |
| Macrocell Count | 560 | — |
| Usable Gates | 12,000 (typical) | 12,000 |
| Propagation Delay (tPD) | 16.6 ns | — |
| Maximum Clock Frequency | 117.6 MHz | — |
| Supply Voltage (VCCINT/VCCIO) | 5.0 V | — |
| Maximum Supply Voltage | 5.25 V | — |
| Logic Technology | CMOS EEPROM | — |
| In-System Programmability | Yes (5.0-V ISP via JTAG) | — |
| Boundary-Scan (JTAG) | IEEE Std. 1149.1 compliant | — |
| Package | CPGA-280 (Ceramic Pin Grid Array, 280 pins) | 240-pin RQFP (32x32 mm) |
| Package Code | PGA / CPGA280 | — |
| Terminal Form | PIN/PEG | — |
| Operating Temperature Grade | Commercial | — |
| Architecture | Multiple Array MatriX (MAX) 3rd generation | — |
| Programmable Type | — | In System Programmable (ISP) |
| Macro Cells | — | 480 |
| Pin-to-Pin Delay (tPD) | — | 15 ns |
| Internal Supply Voltage | — | 4.75 V to 5.25 V |
| Configuration Technology | — | EEPROM-based (non-volatile) |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Supplier Device Package | — | 240-RQFP (32x32) |
| Mounting Type | — | Surface Mount |
| Operating Temperature | — | [DATA_NEEDED: operating temperature range] |
| Number of I/O Pins | — | [DATA_NEEDED: user I/O count] |
| RoHS Status | — | RoHS non-compliant |
| Lead Free Status | — | [DATA_NEEDED: lead free status] |
| Logic Architecture | — | Multiple Array MatriX (MAX) third-generation |
| Supply Voltage (5.0 V nominal) | — | 5.0 V |