EPM9560RC208-15C vs EPM9560RC208-5 Comparison
Detailed side-by-side comparison of EPM9560RC208-15C by Altera and EPM9560RC208-5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC208-15C | EPM9560RC208-5 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $62.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD (EPLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | β |
| User I/O Pins | 149 | β |
| Propagation Delay (tPD) | 15 ns | 5 ns |
| Maximum Counter Frequency | 117.6 MHz | β |
| Supply Voltage Range | 4.75 V to 5.25 V | β |
| Nominal Supply Voltage | 5.0 V | β |
| I/O Voltage Compatibility | 3.3 V or 5 V | β |
| Configuration Memory | EEPROM (non-volatile) | β |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | β |
| Package | 208-pin RQFP | 208-pin RQFP (Plastic Quad Flat Pack) |
| Mounting Type | Surface Mount | β |
| Operating Temperature Range | 0C to +70C (commercial) | β |
| Speed Grade | -15 (15 ns) | β |
| RoHS Status | [DATA_NEEDED: RoHS status] | Non-compliant (5V process, legacy RQFP) |
| Logic Architecture | Multiple Array MatriX (MAX) third generation | β |
| Macro Cells | β | 560 |
| Logic Array Blocks (LABs) | β | 16 |
| Maximum User I/O | β | 149 |
| Dedicated Inputs | β | 16 |
| Flip-Flops | β | 772 |
| Internal Counter Frequency (fCNT) | β | 117.6 MHz |
| Supply Voltage (VCC) | β | 5.0 V |
| Process Technology | β | CMOS EEPROM |
| Programming Interface | β | JTAG (IEEE Std 1149.1) + 5V ISP |
| Operating Temperature | β | 0C to +70C (commercial) |