EPM9560RC208-15C vs EPM9560RC208-5 Pengandingan
Pengandingan Sisi Kiri Sisi Kanan Terperinci EPM9560RC208-15C disebabkan oleh Altera dan EPM9560RC208-5 disebabkan oleh Altera. Bandingkan spesifikasi utama, parameter elektrik, pakej, status kehidupan, harga, dan keupayaan untuk menentukan komponen terbaik untuk keperluan disenjaya anda.
Pengandingan Spesifikasi
| Parametr | EPM9560RC208-15C | EPM9560RC208-5 |
|---|---|---|
| Merek | Altera | Altera |
| Kategori | FPGA & CPLD | FPGA & CPLD |
| Status Lingkungan Hidup | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | EEPROM-based CPLD (EPLD) | CPLD (Complex Programmable Logic Device) |
| Usable Gates | 12,000 | 12,000 |
| Macrocells | 560 | — |
| User I/O Pins | 149 | — |
| Propagation Delay (tPD) | 15 ns | 5 ns |
| Maximum Counter Frequency | 117.6 MHz | — |
| Supply Voltage Range | 4.75 V to 5.25 V | — |
| Nominal Supply Voltage | 5.0 V | — |
| I/O Voltage Compatibility | 3.3 V or 5 V | — |
| Configuration Memory | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| Kemasan | 208-pin RQFP | 208-pin RQFP (Plastic Quad Flat Pack) |
| Jenis Pemasangan | Surface Mount | — |
| Gambaran Suhu Operasi | 0C to +70C (commercial) | — |
| Speed Grade | -15 (15 ns) | — |
| Status RoHS | [DATA_NEEDED: RoHS status] | Non-compliant (5V process, legacy RQFP) |
| Logic Architecture | Multiple Array MatriX (MAX) third generation | — |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O | — | 149 |
| Dedicated Inputs | — | 16 |
| Flip-Flops | — | 772 |
| Internal Counter Frequency (fCNT) | — | 117.6 MHz |
| Supply Voltage (VCC) | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| Programming Interface | — | JTAG (IEEE Std 1149.1) + 5V ISP |
| Suhu Operasi | — | 0C to +70C (commercial) |