EPM9560RC208-20 vs EPM9560RC208-10 Comparison

Detailed side-by-side comparison of EPM9560RC208-20 by Intel and EPM9560RC208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC208-20 EPM9560RC208-10
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Family MAX 9000 (EPM9560) —
Macrocells 560 560
Usable Gates 12,000 12,000
Logic Array Blocks 35 —
User I/O Pins 153 —
Pin-to-Pin Delay (tPD) 20 ns 10 ns
Maximum Clock Frequency 100 MHz —
Supply Voltage 5.0 V —
Configuration Technology EEPROM (non-volatile) —
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG —
Package 208-pin RQFP (28x28 mm) 208-pin RQFP (Plastic Quad Flat Pack)
Mounting Type Surface Mount Surface Mount
Operating Temperature 0C to +70C (commercial) 0C to +70C (commercial)
I/O Standards 5.0 V TTL/CMOS compatible —
Flip-Flops 772 —
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: not stated in retrieved distributor listings]
MSL Level [DATA_NEEDED: MSL level] —
Family — MAX 9000
Device Type — CPLD (Complex Programmable Logic Device)
Logic Array Blocks (LABs) — 16
Maximum User I/O Pins — 212 (208-pin package variant)
Maximum Frequency (fMAX) — [DATA_NEEDED: internal toggle frequency in MHz]
Supply Voltage (VCCINT) — 5.0 V
I/O Standards Supported — 5.0 V TTL, 3.3 V LVTTL, 2.5 V (multiVolt I/O)
Configuration Memory — EEPROM (in-system programmable via JTAG)
Process Technology — 0.30 µm CMOS EEPROM
Lead-Free — [DATA_NEEDED: confirm lead-free status -10 suffix is conventional Pb-containing]
Programmability — JTAG (IEEE 1149.1) in-system programming

Datasheets & Resources

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