EPM9560RC208-20 vs EPM9560RC208-17 Comparison
Detailed side-by-side comparison of EPM9560RC208-20 by Intel and EPM9560RC208-17 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC208-20 | EPM9560RC208-17 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | NRND |
| Device Family | MAX 9000 (EPM9560) | — |
| Macrocells | 560 | — |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks | 35 | — |
| User I/O Pins | 153 | 212 |
| Pin-to-Pin Delay (tPD) | 20 ns | 17 ns |
| Maximum Clock Frequency | 100 MHz | — |
| Supply Voltage | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| Package | 208-pin RQFP (28x28 mm) | 208-pin RQFP (RC208) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (commercial) | — |
| I/O Standards | 5.0 V TTL/CMOS compatible | — |
| Flip-Flops | 772 | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | — |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| Family | — | MAX 9000 |
| Product Type | — | CPLD (EPLD, in-system programmable) |
| Macro Cells | — | 560 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum Counter Frequency | — | 117.6 MHz |
| Supply Voltage (VCC) | — | 5 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| Program/Erase Cycles | — | 100 minimum |
| JTAG (IEEE 1149.1) Support | — | Yes |
| Architecture | — | Third-generation MAX (AND-OR PLA) |