EPM9560RC208-20 vs EPM9560RC208-20N Comparison
Detailed side-by-side comparison of EPM9560RC208-20 by Intel and EPM9560RC208-20N by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC208-20 | EPM9560RC208-20N |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 (EPM9560) |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks | 35 | β |
| User I/O Pins | 153 | 149 |
| Pin-to-Pin Delay (tPD) | 20 ns | β |
| Maximum Clock Frequency | 100 MHz | β |
| Supply Voltage | 5.0 V | 5.0 V |
| Configuration Technology | EEPROM (non-volatile) | EEPROM (non-volatile) |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes, via IEEE Std. 1149.1 JTAG |
| Package | 208-pin RQFP (28x28 mm) | 208-pin RQFP (PowerQuad Flat Pack) |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| I/O Standards | 5.0 V TTL/CMOS compatible | β |
| Flip-Flops | 772 | 772 (per EPM9560 series data) |
| RoHS Status | [DATA_NEEDED: RoHS status] | Lead-free (N suffix) |
| MSL Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Propagation Delay (tPD) | β | 20 ns |
| JTAG Interface | β | IEEE Std. 1149.1 |
| Logic Architecture | β | Multiple Array MatriX (MAX), third-generation CMOS EEPROM |
| Speed Grade | β | -20 (20 ns) |