EPM9560RC208-20 vs EPM9560RC208-20N Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-20 sa pamamagitan ng Intel at EPM9560RC208-20N sa pamamagitan ng Intel. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC208-20 | EPM9560RC208-20N |
|---|---|---|
| Brand | Intel | Intel |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 (EPM9560) |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks | 35 | — |
| User I/O Pins | 153 | 149 |
| Pin-to-Pin Delay (tPD) | 20 ns | — |
| Maksimum na Taktiko ng Oras | 100 MHz | — |
| Volte ng Pagbibigay | 5.0 V | 5.0 V |
| Configuration Technology | EEPROM (non-volatile) | EEPROM (non-volatile) |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes, via IEEE Std. 1149.1 JTAG |
| Packhaging | 208-pin RQFP (28x28 mm) | 208-pin RQFP (PowerQuad Flat Pack) |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| I/O Standards | 5.0 V TTL/CMOS compatible | — |
| Flip-Flops | 772 | 772 (per EPM9560 series data) |
| Tindminan RoHS | [DATA_NEEDED: RoHS status] | Lead-free (N suffix) |
| Level ng MSL | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| Propagation Delay (tPD) | — | 20 ns |
| JTAG Interface | — | IEEE Std. 1149.1 |
| Logic Architecture | — | Multiple Array MatriX (MAX), third-generation CMOS EEPROM |
| Speed Grade | — | -20 (20 ns) |