EPM9560RC208-20C vs EPM9560RC208-20 Comparison

Detailed side-by-side comparison of EPM9560RC208-20C by Altera and EPM9560RC208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Altera
EPM9560RC208-20C

EPM9560RC208-20C - MAX 9000 CPLD 560 Macro Cells | Altera

EPM9560RC208-20C Obsolete
Intel
EPM9560RC208-20

EPM9560RC208-20 - MAX 9000 CPLD 560 Macrocell 20ns | Intel

EPM9560RC208-20 Obsolete

Specification Comparison

Parameter EPM9560RC208-20C EPM9560RC208-20
Brand Altera Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $0.00
Family MAX 9000 β€”
Device Type EEPROM-based CPLD (EE PLD) β€”
Macrocells 560 560
Usable Gates 12,000 12,000
Flip-Flops 772 772
Configurable I/O Lines 149 β€”
Propagation Delay (tPD) 20 ns (speed grade -20) β€”
Maximum Frequency 100 MHz β€”
Supply Voltage 5.0 V 5.0 V
I/O Voltage Support 3.3 V or 5 V β€”
Configuration Memory EEPROM (non-volatile) β€”
In-System Programmability Yes, via IEEE Std. 1149.1 JTAG Yes, via IEEE Std. 1149.1 JTAG
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (28x28 mm)
JESD-30 Package Code S-PQFP-G208 β€”
Terminal Form Gull Wing β€”
Operating Temperature Grade Commercial (0C to +70C) β€”
Technology CMOS β€”
Mounting Type Surface Mount Surface Mount
RoHS Status [DATA_NEEDED: RoHS status] [DATA_NEEDED: RoHS status]
Device Family β€” MAX 9000 (EPM9560)
Logic Array Blocks β€” 35
User I/O Pins β€” 153
Pin-to-Pin Delay (tPD) β€” 20 ns
Maximum Clock Frequency β€” 100 MHz
Configuration Technology β€” EEPROM (non-volatile)
Operating Temperature β€” 0C to +70C (commercial)
I/O Standards β€” 5.0 V TTL/CMOS compatible
MSL Level β€” [DATA_NEEDED: MSL level]

Datasheets & Resources

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