EPM9560RC208-20C - MAX 9000 CPLD 560 Macro Cells | Altera
MPN: EPM9560RC208-20C β End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $0 | $0.00 |
| 10 | $0 | $0.00 |
| 100 | $0 | $0.00 |
| 500 | $0 | $0.00 |
| 1,000 | $0 | $0.00 |
Drop-in alternatives for EPM9560RC208-20C β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
EPM9560RC208-20
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View Datasheet βEPM9560RC208-15C
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Contact for price
View Datasheet βEPM9560RC208-15N
β Drop-Inβ In Stock
$19.85 / Unit
View Datasheet βEPM9560RC208-10N
β Drop-Inβ In Stock
$175 / Unit
View Datasheet βEPM9480RC208-20C
β Drop-Inπ Reference alternative (not in catalog)
EPM9400RC208-20
β Drop-Inβ In Stock
$60.49 / Unit
View Datasheet βEPM9560RC208-20C Maximum Ratings & Electrical Characteristics
| Family | MAX 9000 |
| Device Type | EEPROM-based CPLD (EE PLD) |
| Macrocells | 560 |
| Usable Gates | 12,000 |
| Flip-Flops | 772 |
| Configurable I/O Lines | 149 |
| Propagation Delay (tPD) | 20 ns (speed grade -20) |
| Maximum Frequency | 100 MHz |
| Supply Voltage | 5.0 V |
| I/O Voltage Support | 3.3 V or 5 V |
| Configuration Memory | EEPROM (non-volatile) |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG |
| Package | 208-pin RQFP (Power Quad Flat Pack) |
| JESD-30 Package Code | S-PQFP-G208 |
| Terminal Form | Gull Wing |
| Operating Temperature Grade | Commercial (0C to +70C) |
| Technology | CMOS |
| Mounting Type | Surface Mount |
EPM9560RC208-20C Pin Configuration
| Pin 1 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 2 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 3 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 4 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 5 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 6 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 7 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 8 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 9 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 10 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 11 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 12 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 13 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 14 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 15 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 16 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 17 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 18 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 19 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 20 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 21 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 22 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 23 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 24 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 25 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 26 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 27 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 28 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 29 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 30 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 31 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 32 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 33 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 34 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 35 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 36 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 37 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 38 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 39 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 40 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 41 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 42 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 43 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 44 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 45 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 46 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 47 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 48 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 49 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 50 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 51 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 52 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 53 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 54 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 55 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 56 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 57 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 58 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 59 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 60 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 61 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 62 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 63 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 64 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 65 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 66 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 67 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 68 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 69 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 70 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 71 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 72 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 73 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 74 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 75 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 76 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 77 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 78 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 79 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 80 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 81 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 82 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 83 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 84 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 85 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 86 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 87 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 88 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 89 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 90 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 91 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 92 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 93 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 94 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 95 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 96 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 97 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 98 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 99 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 100 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 101 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 102 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 103 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 104 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 105 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 106 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 107 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 108 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 109 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 110 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 111 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 112 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 113 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 114 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 115 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 116 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 117 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 118 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 119 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 120 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 121 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 122 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 123 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 124 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 125 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 126 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 127 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 128 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 129 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 130 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 131 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 132 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 133 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 134 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 135 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 136 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 137 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 138 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 139 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 140 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 141 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 142 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 143 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 144 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 145 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 146 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 147 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 148 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 149 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 150 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 151 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 152 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 153 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 154 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 155 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 156 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 157 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 158 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 159 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 160 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 161 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 162 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 163 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 164 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 165 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 166 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 167 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 168 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 169 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 170 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 171 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 172 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 173 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 174 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 175 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 176 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 177 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 178 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 179 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 180 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 181 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 182 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 183 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 184 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 185 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 186 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 187 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 188 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 189 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 190 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 191 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 192 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 193 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 194 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 195 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 196 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 197 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 198 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 199 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 200 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 201 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 202 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 203 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 204 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 205 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 206 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 207 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
| Pin 208 | I/O β Configurable I/O pin (per MAX 9000 208-pin RQFP pin table) |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
EPM9560RC208-20C is suitable for 6 applications: Industrial Control Glue Logic, Legacy 5 V Microprocessor Bus Interface, Instrumentation State Machines, Telecom Line Card Logic, Prototyping and Educational Digital Logic, Legacy System Sustainment and Repair.
Industrial Control Glue Logic
The EPM9560RC208-20C fits industrial control glue logic because its 560 macrocells and 149 configurable I/O lines consolidate address decoding, bus arbitration, and state-machine logic that would otherwise require dozens of discrete 74-series devices. Operating from a 5.0 V rail with 3.3 V or 5 V I/O support, it interfaces directly with legacy 5 V microcontrollers and industrial backplanes without level shifters. The non-volatile EEPROM configuration provides instant-on operation after power-up, so the control logic is valid within microseconds of the 5 V rail stabilizing, unlike SRAM-based FPGAs that require configuration loading. The 20 ns pin-to-pin propagation delay gives deterministic timing for combinational decode paths, and the fixed interconnect array delay simplifies worst-case timing analysis. A trade-off is the commercial 0C to +70C temperature grade, which limits use in high-temperature industrial cabinets without derating or thermal management.
Recommended
Legacy 5 V Microprocessor Bus Interface
The EPM9560RC208-20C is well suited to legacy 5 V microprocessor bus interfacing because its 5.0 V supply and 3.3 V/5 V I/O support match the signaling levels of classic 8-bit and 16-bit MPU buses without external level translation. With 149 configurable I/O lines, it can implement address decoding, wait-state generation, chip-select expansion, and DMA handshake logic in a single device, replacing multiple PALs and discrete glue chips. The 20 ns propagation delay supports bus cycles in the 100 MHz range, and the EEPROM configuration retains the bus logic across power cycles, eliminating boot-time configuration. Designers should account for the 208-pin RQFP footprint and the need for a clean 5.0 V rail with decoupling on every VCC pin. The main trade-off versus a modern CPLD is higher static power and the obsolete lifecycle status, which requires last-time-buy planning.
Recommended
Instrumentation State Machines
The EPM9560RC208-20C suits instrumentation state machines because its 772 flip-flops and 560 macrocells implement complex multi-state control sequencers for test and measurement equipment without an external configuration memory. The non-volatile EEPROM cell means the instrument boots directly into its operating state, which is important for benchtop equipment that must be ready immediately after power-on. The 100 MHz maximum frequency and 20 ns propagation delay support moderate-speed acquisition sequencing, trigger logic, and front-panel control. With 149 I/O lines, the device can drive display controllers, relay drivers, and ADC/DAC interfaces simultaneously. A practical consideration is that the MAX 9000 family requires the legacy MAX+PLUS II toolchain, so design teams must maintain that software environment. The commercial temperature grade is adequate for laboratory environments but not for harsh field instrumentation.
Recommended
Telecom Line Card Logic
The EPM9560RC208-20C can serve telecom line card logic because its 560 macrocells and 149 I/O pins handle protocol framing, timeslot interchange control, and backplane interface glue in a single non-volatile device. The 5.0 V supply and 3.3 V/5 V I/O compatibility match the signaling of legacy telecom backplanes, and the 20 ns propagation delay supports the timing margins of E1/T1 and lower-rate SONET tributary interfaces. Instant-on EEPROM configuration ensures the line card is ready as soon as power is applied, avoiding the configuration-loading delay of SRAM FPGAs. Designers should note the 208-pin RQFP package requires careful thermal and signal-integrity layout for the high pin count. The obsolete lifecycle status means new telecom designs should evaluate modern CPLDs, but the part remains viable for sustaining existing line cards.
Recommended
Prototyping and Educational Digital Logic
The EPM9560RC208-20C is useful for prototyping and educational digital logic because its 560 macrocells and 149 I/O lines allow students and engineers to implement complete digital systems, from ALUs to bus controllers, on a single reprogrammable device. The EEPROM configuration can be erased and reprogrammed, supporting iterative laboratory exercises, and the 5.0 V supply is compatible with standard breadboard and development-board power rails. The 20 ns propagation delay and 100 MHz maximum frequency are sufficient for teaching synchronous design, timing analysis, and state-machine concepts. The 208-pin RQFP package requires a proper PCB or adapter, which is a practical barrier for breadboard use. The legacy MAX+PLUS II toolchain is still available for academic use, but new curricula typically favor modern FPGA boards with free toolchains.
Recommended
Legacy System Sustainment and Repair
The EPM9560RC208-20C is critical for legacy system sustainment and repair because many industrial, medical, and telecom systems designed in the 1990s use MAX 9000 CPLDs that are now obsolete. Maintaining spare inventory of the EPM9560RC208-20C and its pin-compatible variants allows repair of fielded equipment without full board redesign. The 208-pin RQFP footprint and 560-macrocell density match the original design, so replacement requires no layout change, and the EEPROM configuration can be reprogrammed from the original JEDEC file. The main challenge is sourcing authentic parts with valid date codes, since the MAX 9000 family is no longer in production. Buyers should verify provenance and consider last-time-buy quantities. The commercial temperature grade matches the original commercial-grade systems.
Recommended
Recommended Products Summary
Engineering reference data for EPM9560RC208-20C β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | EPM9560RC208-20 | EPM9560RC208-15C | EPM9480RC208-20C | EPM9400RC208-20 |
|---|---|---|---|---|---|
| Package | 208-pin RQFP | 208-pin RQFP - same | 208-pin RQFP - same | 208-pin RQFP - same | 208-pin RQFP - same |
| Brand | Altera | Altera | Altera | Altera | Altera |
| Macrocells | 560 | 560 | 560 | 480 | 400 |
| Usable Gates | 12,000 | 12,000 | 12,000 | 10,000 | [DATA_NEEDED] |
| Propagation Delay | 20 ns | 20 ns | 15 ns | 20 ns | 20 ns |
| Maximum Frequency | 100 MHz | 100 MHz | 100 MHz | 100 MHz | 100 MHz |
| Supply Voltage | 5.0 V | 5.0 V | 5.0 V | 5.0 V | 5.0 V |
| Configurable I/O Lines | 149 | 149 | 149 | [DATA_NEEDED] | [DATA_NEEDED] |
| Configuration Memory | EEPROM (non-volatile) | EEPROM (non-volatile) | EEPROM (non-volatile) | EEPROM (non-volatile) | EEPROM (non-volatile) |
| Temperature Grade | Commercial (0C to +70C) | Commercial | Commercial | Commercial | Commercial |
Key Differentiators
- Highest macrocell density in the MAX 9000 family (vs EPM9480RC208-20C)
- Non-volatile EEPROM configuration with instant-on operation (vs EPM9400RC208-20)
- 20 ns speed grade balances timing and power (vs EPM9560RC208-15C)
- 5.0 V operation with 3.3 V/5 V I/O compatibility (vs EPM9560RC208-20)
Design Notes
Decouple every VCC pin of the EPM9560RC208-20C with a 0.1 uF ceramic capacitor placed as close to the pin as possible, plus at least one 10 uF bulk capacitor per power plane. The MAX 9000 family operates from a 5.0 V supply with 3.3 V or 5 V I/O support; because the device is a 5 V CPLD, do not power the core from 3.3 V. Estimated: at 100 MHz with typical toggle rates, dynamic current can reach several hundred milliamps, so verify the 5.0 V regulator can supply the transient current without droop.
The 208-pin RQFP package uses gull-wing terminals on a 0.5 mm pitch, requiring a fine-pitch PCB footprint and careful solder-paste stencil design. Route the JTAG signals (TCK, TMS, TDI, TDO) as short, matched traces to the programming header and keep them away from high-speed I/O to avoid corrupting in-system programming. Provide a solid ground plane under the device and connect all ground pins with thermal-relief vias to manage return currents.
The EPM9560RC208-20C is a legacy MAX 9000 device that requires the MAX+PLUS II development toolchain, which is no longer actively maintained; confirm tool availability before committing to a new design. Because the part is obsolete, plan a last-time-buy and validate date codes and provenance from distributors. Do not assume the 20 ns propagation delay applies to every path: the MAX 9000 programmable interconnect array adds fixed delay, so always run the post-fit timing analysis rather than relying on the headline tPD figure.
Compliance Information
No compliance data was present in the verified web data for EPM9560RC208-20C. The MAX 9000 family predates current RoHS/REACH documentation practices; confirm compliance with the distributor or manufacturer before use in regulated markets.
