EPM9560RC208-20N vs EPM9560TC208-20 Comparison
Detailed side-by-side comparison of EPM9560RC208-20N by Intel and EPM9560TC208-20 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC208-20N | EPM9560TC208-20 |
|---|---|---|
| Brand | Intel | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12000 |
| Propagation Delay (tPD) | 20 ns | 20 ns |
| Package | 208-pin RQFP (PowerQuad Flat Pack) | TQFP-208 (TC208) |
| User I/O Pins | 149 | — |
| Supply Voltage | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| JTAG Interface | IEEE Std. 1149.1 | — |
| Mounting Type | Surface Mount | Surface Mount |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial/industrial temperature grade] |
| RoHS Status | Lead-free (N suffix) | unknown |
| Logic Architecture | Multiple Array MatriX (MAX), third-generation CMOS EEPROM | — |
| Flip-Flops | 772 (per EPM9560 series data) | 772 |
| Speed Grade | -20 (20 ns) | -20 |
| MSL Level | [DATA_NEEDED: MSL level] | — |
| User I/O | — | 149 |
| Pin/Package Code | — | TC208 (JEDEC S-PQFP-G208) |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Technology | — | CMOS EEPROM |
| Core Supply Voltage | — | 5 V |
| I/O Supply Voltage (MultiVolt) | — | 3.3 V or 5 V |
| In-System Programming | — | Yes (IEEE Std 1149.1 JTAG) |