EPM9560RC208-20N vs EPM9560TC208-20 Ikinahambing
Detalyadong pagkakahiwalay na pagkakahambing ng EPM9560RC208-20N sa pamamagitan ng Intel at EPM9560TC208-20 sa pamamagitan ng Altera. Ikinahambing ang mga pangunahing paglalarawan, mga tama ng elektriko, paakay, kalagayan ng buhay, presyo, at pagkakaroon upang makita ang pinakamahusay na komponente para sa iyong mga kinakailangang pang disenyo.
Pagsanggunian na paghahambing
| Parametro | EPM9560RC208-20N | EPM9560TC208-20 |
|---|---|---|
| Brand | Intel | Altera |
| Kategorya | FPGA & CPLD | FPGA & CPLD |
| Katayuan ng Lifecycle | Obsolete | Obsolete |
| Device Family | MAX 9000 (EPM9560) | MAX 9000 |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12000 |
| Propagation Delay (tPD) | 20 ns | 20 ns |
| Packhaging | 208-pin RQFP (PowerQuad Flat Pack) | TQFP-208 (TC208) |
| User I/O Pins | 149 | — |
| Volte ng Pagbibigay | 5.0 V | — |
| Configuration Technology | EEPROM (non-volatile) | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | — |
| JTAG Interface | IEEE Std. 1149.1 | — |
| Uri ng Pagpapasok | Surface Mount | Surface Mount |
| Temperature na Operasyon | [DATA_NEEDED: operating temperature range] | [DATA_NEEDED: commercial/industrial temperature grade] |
| Tindminan RoHS | Lead-free (N suffix) | unknown |
| Logic Architecture | Multiple Array MatriX (MAX), third-generation CMOS EEPROM | — |
| Flip-Flops | 772 (per EPM9560 series data) | 772 |
| Speed Grade | -20 (20 ns) | -20 |
| Level ng MSL | [DATA_NEEDED: MSL level] | — |
| User I/O | — | 149 |
| Pin/Package Code | — | TC208 (JEDEC S-PQFP-G208) |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Technology | — | CMOS EEPROM |
| Core Supply Voltage | — | 5 V |
| I/O Supply Voltage (MultiVolt) | — | 3.3 V or 5 V |
| In-System Programming | — | Yes (IEEE Std 1149.1 JTAG) |