EPM9560RC208-21 vs EPM9560RC208-20 Comparison

Detailed side-by-side comparison of EPM9560RC208-21 by Intel and EPM9560RC208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RC208-21 EPM9560RC208-20
Brand Intel Intel
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Last Time Buy Obsolete
Family MAX 9000 —
Architecture Multiple Array MatriX (MAX), third-generation —
Technology CMOS EEPROM-based —
Macrocells 560 560
Usable Gates 12,000 12,000
Logic Array Blocks (LABs) 16 —
Flip-Flops 772 772
Maximum User I/O 149 —
Propagation Delay (speed grade -21) 21 ns (max, per speed grade designation) —
Supply Voltage 5.0 V 5.0 V
I/O Voltage Tolerance 3.3 V or 5 V (per variant) —
In-System Programmability Yes (IEEE Std. 1149.1 JTAG) Yes, via IEEE Std. 1149.1 JTAG
Package 208-pin RQFP (Power Quad Flat Pack) 208-pin RQFP (28x28 mm)
Operating Temperature [DATA_NEEDED: industrial or commercial grade -21 suffix] 0C to +70C (commercial)
Configuration Memory EEPROM (non-volatile) —
Security Bit Yes (programmable) —
RoHS Status [DATA_NEEDED: confirm RoHS compliance for -21 variant] [DATA_NEEDED: RoHS status]
Device Family — MAX 9000 (EPM9560)
Logic Array Blocks — 35
User I/O Pins — 153
Pin-to-Pin Delay (tPD) — 20 ns
Maximum Clock Frequency — 100 MHz
Configuration Technology — EEPROM (non-volatile)
Mounting Type — Surface Mount
I/O Standards — 5.0 V TTL/CMOS compatible
MSL Level — [DATA_NEEDED: MSL level]

Datasheets & Resources

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