EPM9560RC208-4 vs EPM9560RC208-3 Comparison
Detailed side-by-side comparison of EPM9560RC208-4 by Altera and EPM9560RC208-3 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC208-4 | EPM9560RC208-3 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Last Time Buy |
| Family | MAX 9000 | MAX 9000 |
| Device | EPM9560 | — |
| Macrocells | 560 | 560 |
| Usable Gates | 12,000 | 12,000 |
| Logic Array Blocks (LABs) | 16 | 16 |
| Maximum Operating Frequency | 118.3 MHz | [DATA_NEEDED: f_MAX] |
| Pin-to-Pin Delay (tPD) | 4 ns | — |
| Speed Grade | -4 | -3 |
| Supply Voltage (VCC) | 5 V | — |
| Package | 208-pin RQFP (Power Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| User I/O Pins | 96 (approx., 208-pin RQFP) | — |
| Dedicated Inputs | 16 | — |
| Programming Interface | IEEE 1149.1 JTAG (ISP) | ByteBlaster / BitBlaster (JTAG-compatible) |
| Configuration Memory | EEPROM (non-volatile) | — |
| MultiVolt I/O | 5.0 V / 3.3 V / 2.5 V | — |
| Operating Temperature | 0C to +70C (commercial) | [DATA_NEEDED: industrial / commercial range] |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED] |
| Device Type | — | EPLD (Erasable Programmable Logic Device) |
| Pin-to-Pin Delay (speed grade -3) | — | approximately 3 ns (slowest grade) |
| I/O Voltage Tolerance | — | 5V |
| Process Technology | — | 0.5 µm CMOS EPROM |
| Lifecycle | — | Mature / Last-time-buy (per Altera PDN for selected MAX 9000 ordering codes) |