EPM9560RC240-2 vs EPM9560RC240-12 Comparison
Detailed side-by-side comparison of EPM9560RC240-2 by Altera and EPM9560RC240-12 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RC240-2 | EPM9560RC240-12 |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 (EPM9560) |
| Logic Elements | 560 macrocells | — |
| Usable Gates | 12,000 | — |
| Pin-to-Pin Delay | 2 ns (speed grade -2) | — |
| Maximum Frequency | 100 MHz | — |
| Supply Voltage | 5 V | — |
| User I/O Count | 212 | — |
| Package | 240-pin RQFP (Metric QFP) | PQFP-240 (RC240) 0.500 mm pitch, gull-wing |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1), in-system programmable | IEEE 1149.1 JTAG |
| Non-Volatile Configuration | Yes (EEPROM-based) | — |
| Operating Temperature | [DATA_NEEDED: commercial/industrial grade] | [DATA_NEEDED: operating temperature grade] |
| RoHS Status | Non-compliant (5V RQFP, pre-RoHS era) | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | No (legacy Sn/Pb process) | — |
| Logic Block Count | [DATA_NEEDED: LAB count] | — |
| Device Type | — | EE PLD / CPLD |
| Macrocells | — | 560 |
| Flip-Flops | — | 772 |
| User I/O Pins | — | 191 |
| Logic Array Blocks (LABs) | — | 20 |
| Maximum Propagation Delay (tPD) | — | 13.4 ns |
| Speed Grade | — | -12 (13.4 ns tPD) |
| Maximum Operating Frequency (estimated) | — | ~76 MHz registered |
| Core Supply Voltage (VCCINT) | — | 5 V |
| I/O Logic Levels | — | 3.3 V or 5 V (configurable) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Process Technology | — | CMOS |