EPM9560RC304-15 vs EPM9560RC304-15C Comparison
Detailed side-by-side comparison of EPM9560RC304-15 by Altera and EPM9560RC304-15C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC304-15C - 560 Macro Cell MAX 9000 CPLD 117.6MHz 5V | Altera
EPM9560RC304-15C ObsoleteSpecification Comparison
| Parameter | EPM9560RC304-15 | EPM9560RC304-15C |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 9000 | — |
| Architecture | Multiple Array MatriX (MAX), EEPROM-based | Multiple Array MatriX (MAX), 3rd generation |
| Macrocells | 560 | — |
| Logic Array Blocks (LABs) | 16 | 16 |
| User I/O Pins | 212 (maximum) | — |
| Propagation Delay (tPD) | 15 ns (combinatorial, pin-to-pin) | — |
| Pin Count | 304 | — |
| Package | 304-pin RQFP (Plastic Quad Flat Pack) | 304-pin RQFP |
| Supply Voltage (VCCINT) | 5.0 V | — |
| I/O Standard | 5.0 V TTL / PCI-compliant | — |
| In-System Programmability | Yes, via IEEE Std. 1149.1 JTAG | Yes (IEEE 1149.1 JTAG) |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Technology Node | High-performance CMOS, EEPROM process | — |
| Operating Temperature | [DATA_NEEDED: industrial/commercial temperature grade] | 0 C to +70 C (Commercial) |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | [DATA_NEEDED: lead-free / RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Family | — | MAX 9000 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Usable Gates | — | 12,000 |
| Macro Cells | — | 560 |
| User I/O Pins (maximum) | — | 212 |
| Maximum Operating Frequency | — | 117.6 MHz |
| Pin-to-Pin Propagation Delay (tPD) | — | 15 ns |
| Supply Voltage | — | 5.0 V |
| Process Technology | — | CMOS EEPROM |
| Program/Erase Endurance | — | 100 cycles minimum |