EPM9560RC304C-3 vs EPM9560RC304-2 Comparison
Detailed side-by-side comparison of EPM9560RC304C-3 by Altera and EPM9560RC304-2 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560RC304C-3 - MAX 9000 CPLD, 560 Macrocells, 304-Pin RBGGA | Altera
EPM9560RC304C-3 ObsoleteIntel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 ObsoleteSpecification Comparison
| Parameter | EPM9560RC304C-3 | EPM9560RC304-2 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD) | CPLD (EPLD - Erasable PLD) |
| Macrocells (Logic Elements) | 560 | — |
| Usable Gates | 12,000 | Approximately 12,000 |
| Package | RBGGA-304 (Ceramic Ball Grid Array) | 304-pin RQFP (RC) |
| Pin Count | 304 | — |
| User I/O Pins | 212 | 304 |
| Speed Grade | -3 (3 ns pin-to-pin, commercial) | -2 |
| Operating Temperature | 0 C to +70 C (Commercial) | Commercial (0C to +70C) |
| Supply Voltage | 5 V | — |
| Programmability | In-system, non-volatile EEPROM | — |
| JTAG Support | IEEE 1149.1 boundary-scan | IEEE Std. 1149.1 (boundary-scan + ISP) |
| Logic Blocks | Logic Array Blocks (LABs) with PIA interconnect | — |
| RoHS Status | unknown (legacy part, pre-RoHS era) | [DATA_NEEDED: RoHS compliance status] |
| Mounting Type | Surface Mount (BGA) | Surface Mount |
| Logic Array Blocks (LABs) | — | 16 |
| Macrocells | — | [DATA_NEEDED: macrocell count] |
| Core Supply Voltage | — | 5.0 V |
| I/O Supply Voltage | — | 5.0 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |