EPM9560RC304C-3 vs EPM9560RC304-2 比較
詳細な並列比較: EPM9560RC304C-3 メーカー: Altera および EPM9560RC304-2 メーカー: Intel。主要仕様、電気的特性、パッケージ、ライフサイクルステータス、価格、在庫状況を比較して、設計要件に最適な部品を判断してください。
Altera
EPM9560RC304C-3 - MAX 9000 CPLD, 560 Macrocells, 304-Pin RBGGA | Altera
EPM9560RC304C-3 ObsoleteIntel
EPM9560RC304-2 - MAX 9000 EPLD 12k Gates 304-pin RQFP | Intel / Altera
EPM9560RC304-2 Obsolete仕様比較
| パラメータ | EPM9560RC304C-3 | EPM9560RC304-2 |
|---|---|---|
| ブランド | Altera | Intel |
| カテゴリ | FPGA & CPLD | FPGA & CPLD |
| ライフサイクル状態 | Obsolete | Obsolete |
| 在庫状況 | In Stock | In Stock |
| 単価（USD） | $95.00 | $55.00 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (EPLD) | CPLD (EPLD - Erasable PLD) |
| Macrocells (Logic Elements) | 560 | — |
| Usable Gates | 12,000 | Approximately 12,000 |
| パッケージ | RBGGA-304 (Ceramic Ball Grid Array) | 304-pin RQFP (RC) |
| ピン数 | 304 | — |
| User I/O Pins | 212 | 304 |
| Speed Grade | -3 (3 ns pin-to-pin, commercial) | -2 |
| 動作温度 | 0 C to +70 C (Commercial) | Commercial (0C to +70C) |
| 電源電圧 | 5 V | — |
| Programmability | In-system, non-volatile EEPROM | — |
| JTAG Support | IEEE 1149.1 boundary-scan | IEEE Std. 1149.1 (boundary-scan + ISP) |
| Logic Blocks | Logic Array Blocks (LABs) with PIA interconnect | — |
| RoHS ステータス | unknown (legacy part, pre-RoHS era) | [DATA_NEEDED: RoHS compliance status] |
| 実装タイプ | Surface Mount (BGA) | Surface Mount |
| Logic Array Blocks (LABs) | — | 16 |
| Macrocells | — | [DATA_NEEDED: macrocell count] |
| Core Supply Voltage | — | 5.0 V |
| I/O Supply Voltage | — | 5.0 V |
| Programming Technology | — | EEPROM (in-system programmable) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Architecture | — | Multiple Array MatriX (MAX) - third generation |
| Configuration Memory | — | On-chip EEPROM (non-volatile) |