EPM9560RCRC304-15 vs EPM9560RC304-5 Comparison

Detailed side-by-side comparison of EPM9560RCRC304-15 by Altera and EPM9560RC304-5 by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter EPM9560RCRC304-15 EPM9560RC304-5
Brand Altera Altera
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Family MAX 9000 (EPM9560) MAX 9000 (EPM9560)
Logic Type EEPROM-based Complex Programmable Logic Device (CPLD) —
Macro Cells 560 —
Usable Gates 12,000 12,000
Pin-to-Pin Propagation Delay (tPD) 15 ns —
Maximum Frequency 117.6 MHz —
Supply Voltage 5.0 V 5.0 V
Configuration Memory EEPROM (non-volatile, in-system programmable) —
In-System Programmability (ISP) Yes, via IEEE Std. 1149.1 JTAG —
JTAG Interface IEEE Std. 1149.1 (built-in) —
Package 304-pin RQFP (PowerQuad Flat Pack) 304-pin RQFP (PowerQuad II)
Mounting Type Surface Mount Surface Mount
Operating Temperature Range [DATA_NEEDED: operating temperature range] [DATA_NEEDED: operating temperature range]
Number of User I/O Pins [DATA_NEEDED: user I/O pin count] —
Architecture Third-generation Multiple Array MatriX (MAX) —
Logic Array Blocks (LABs) [DATA_NEEDED: LAB count] [DATA_NEEDED: number of LABs]
RoHS Status [DATA_NEEDED: RoHS status] ROHS3 Compliant
Lead Finish [DATA_NEEDED: lead finish] —
Device Type — Complex Programmable Logic Device (CPLD) / EPLD
Macrocells — 560
Maximum Operating Frequency — 117.6 MHz (family -15 grade reference)
Speed Grade — -5 (fastest grade in family)
Configuration Technology — EEPROM (non-volatile)
In-System Programmability — Yes (JTAG ISP)
Moisture Sensitivity Level (MSL) — 3 (168 Hours)
Manufacturer Standard Lead Time — 1-7 Days (distributor listing)
Number of I/O Pins — [DATA_NEEDED: number of user I/O pins]
Propagation Delay (tPD) — [DATA_NEEDED: propagation delay]

Datasheets & Resources

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