EPM9560RI208-10N vs EPM9560RC208-20 Comparison
Detailed side-by-side comparison of EPM9560RI208-10N by Altera and EPM9560RC208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RI208-10N | EPM9560RC208-20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Family | MAX 9000 | — |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Architecture | CMOS EEPROM-based Multiple Array MatriX (MAX) | — |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | — |
| Register Bits | 12,160 | — |
| User I/Os | 212 | — |
| Pin-to-Pin Delay | 10 ns (speed grade -10) | — |
| Maximum Frequency | 100 MHz to 125 MHz | — |
| Supply Voltage | 5 V | 5.0 V |
| Package | 208-pin RQFP (PQFP) | 208-pin RQFP (28x28 mm) |
| Operating Temperature | -40C to +85C (Industrial grade, "RI" suffix) | 0C to +70C (commercial) |
| Programming Method | In-system via IEEE 1149.1 (JTAG) | — |
| MSL Level | 3 (168 Hours) | [DATA_NEEDED: MSL level] |
| RoHS Status | ROHS3 Compliant (per fpgalink) | [DATA_NEEDED: RoHS status] |
| Configuration Memory | On-chip EEPROM (non-volatile) | — |
| Device Family | — | MAX 9000 (EPM9560) |
| Macrocells | — | 560 |
| Logic Array Blocks | — | 35 |
| User I/O Pins | — | 153 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Maximum Clock Frequency | — | 100 MHz |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Mounting Type | — | Surface Mount |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |
| Flip-Flops | — | 772 |