EPM9560RI208-15 vs EPM9560RI208-20W Comparison
Detailed side-by-side comparison of EPM9560RI208-15 by Intel and EPM9560RI208-20W by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RI208-15 | EPM9560RI208-20W |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $20.10 | $48.75 |
| Family | MAX 9000 | MAX 9000 |
| Architecture | CMOS EEPROM-based Multiple Array MatriX (MAX) | Third-generation Multiple Array MatriX (MAX) |
| Macrocells | 560 | 560 |
| Typical Usable Gates | 12,000 | β |
| User I/Os | 153 | β |
| Internal Frequency (max) | 145 MHz | β |
| Propagation Delay (tPD) | 11.4 ns (commercial); 15 ns speed grade | β |
| Logic Family | CMOS | β |
| Number of Pins | 208 | β |
| Package Code | HFQFP (Power Quad Flat Pack, gull-wing) | β |
| Package Type | RQFP-208 | β |
| Supply Voltage (VCC) | 5 V nominal (4.5 V to 5.5 V) | β |
| I/O Voltage Support | 3.3 V or 5 V multi-volt I/O | β |
| Operating Temperature | 0 Β°C to 70 Β°C (industrial grade; per package suffix R) | -40C to +85C (Industrial) |
| In-System Programmability | Yes (JTAG / IEEE 1149.1) | Yes (IEEE 1149.1 JTAG) |
| Boundary-Scan (JTAG) | Compliant | β |
| Configuration Memory | On-chip EEPROM (non-volatile) | β |
| RoHS Status | ROHS3 Compliant | β |
| Moisture Sensitivity Level (MSL) | 3 (168 hours) | β |
| Device Type | β | CPLD (Complex Programmable Logic Device) |
| Usable Gates | β | 12,000 |
| Logic Array Blocks (LABs) | β | 16 LABs of 40 macrocells each |
| User I/O Pins | β | 212 |
| Pin-to-Pin Delay (tPD) | β | 20 ns |
| Counter Frequency (fCNT) | β | 100 MHz |
| Speed Grade | β | -20 |
| Supply Voltage | β | 5.0 V |
| Programming Technology | β | CMOS EEPROM |
| Package | β | 208-pin RQFP (Power Quad Flat Pack) |