EPM9560RI208-20 vs EPM9560RI208-10 Comparison
Detailed side-by-side comparison of EPM9560RI208-20 by Intel and EPM9560RI208-10 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560RI208-20 | EPM9560RI208-10 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Nrnd |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $21.10 | $67.80 |
| Family | MAX 9000 | MAX 9000 |
| Device Type | CPLD (Complex Programmable Logic Device) | CPLD (Complex Programmable Logic Device) |
| Architecture | Multiple Array MatriX (MAX) - third generation | β |
| Usable Gates | 12,000 | 12,000 |
| Macro Cells | 560 | β |
| Logic Array Blocks (LABs) | 16 | [DATA_NEEDED: LAB count] |
| Maximum User I/O Pins | 212 | β |
| Pin-to-Pin Propagation Delay (tPD) | 20 ns | β |
| Counter Frequency (fCNT) | 100 MHz | β |
| Supply Voltage (VCC) | 5.0 V | β |
| Process Technology | CMOS EEPROM | β |
| In-System Programmability | Yes (IEEE Std. 1149.1 JTAG) | β |
| Package | 208-pin RQFP (Power-Quad Flat Pack) 28x28 mm | 208-pin RQFP (Power Quad Flat Pack) |
| Operating Temperature | [DATA_NEEDED: operating temperature range grade] | -40 Β°C to +85 Β°C (Industrial) |
| RoHS Status | [DATA_NEEDED: RoHS compliance status] | ROHS3 Compliant |
| Mounting Type | Surface Mount | Surface Mount |
| Macrocells | β | 560 |
| Pin-to-Pin Delay (tPD) | β | 10 ns |
| Maximum Counter Frequency | β | 144 MHz |
| Supply Voltage (VCCINT) | β | 5.0 V |
| User I/O Pins | β | 212 (typical for 208-RQFP package) |
| Programming Interface | β | IEEE 1149.1 (JTAG) / ISP |
| Configuration Memory | β | EEPROM, 100 erase/program cycles |
| Moisture Sensitivity Level (MSL) | β | 3 (168 Hours) |
| Lead Time | β | 1-7 days (per fpgalink listing) |