EPM9560RI240-15N vs EPM9560RI240-15 Comparison
Detailed side-by-side comparison of EPM9560RI240-15N by Intel and EPM9560RI240-15 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Intel
EPM9560RI240-15 - 560-Macrocell MAX 9000 CPLD, 15ns, RQFP-240 | Intel
EPM9560RI240-15 ObsoleteSpecification Comparison
| Parameter | EPM9560RI240-15N | EPM9560RI240-15 |
|---|---|---|
| Brand | Intel | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $23.10 |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | β |
| Logic Family | MAX 9000 (Multiple Array MatriX) | β |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | 772 |
| Usable Gates | 12,000 | β |
| User I/O Pins | 216 | β |
| Package | 240-pin RQFP (PowerQuad Flat Pack) | RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch) |
| Pin-to-Pin Propagation Delay | 15 ns | β |
| Internal Frequency | 145 MHz | β |
| Supply Voltage | 5.0 V | β |
| I/O Voltage Compatibility | 3.3 V or 5.0 V configurable | β |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | β |
| JTAG Interface | IEEE 1149.1 (JTAG) boundary scan | β |
| Operating Temperature Range | -40 C to +85 C (industrial) | β |
| Mounting Type | Surface Mount | Surface Mount |
| RoHS Status | RoHS3 Compliant | β |
| Moisture Sensitivity Level | MSL 3 (168 hours) | β |
| Manufacturer Standard Lead Time | 1-7 days (distributor stock) | β |
| Product Type | β | EE PLD (Electrically Erasable Programmable Logic Device) |
| Family | β | MAX 9000 |
| User I/Os (industrial grade) | β | 191 |
| Dedicated Inputs | β | 4 |
| Propagation Delay (tPD) | β | 15 ns (speed grade -15) |
| Internal Frequency (max) | β | 145 MHz |
| Logic Family / Process | β | CMOS, EEPROM-based |
| Core Voltage | β | 5.0 V |
| I/O Voltage | β | 3.3 V or 5.0 V (configurable) |
| Architecture | β | Multiple Array MatriX (MAX), 3rd generation |
| Operating Temperature | β | -40 C to +85 C (industrial) |
| In-System Programmability | β | Yes, JTAG (IEEE Std 1149.1) |
| Power-Up Configuration | β | Instant-on (no external boot PROM) |
| I/O Undershoot Tolerance | β | -2.0 V for <20 ns (no-load) |
| I/O Overshoot Tolerance | β | 7.0 V for <20 ns (no-load) |