EPM9560RI240-15N vs EPM9560RI240-15 Comparación
Comparación detallada lado a lado de EPM9560RI240-15N por Intel y EPM9560RI240-15 por Intel. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Intel
EPM9560RI240-15 - 560-Macrocell MAX 9000 CPLD, 15ns, RQFP-240 | Intel
EPM9560RI240-15 ObsoleteComparación de especificaciones
| Parámetro | EPM9560RI240-15N | EPM9560RI240-15 |
|---|---|---|
| Marca | Intel | Intel |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $0,00 | $23,10 |
| Device Type | EEPROM-based Complex Programmable Logic Device (CPLD) | — |
| Logic Family | MAX 9000 (Multiple Array MatriX) | — |
| Macrocells | 560 | 560 |
| Flip-Flops | 772 | 772 |
| Usable Gates | 12,000 | — |
| User I/O Pins | 216 | — |
| Encapsulado | 240-pin RQFP (PowerQuad Flat Pack) | RQFP-240 (Power Quad Flat Pack, gull-wing, 0.500 mm pitch) |
| Pin-to-Pin Propagation Delay | 15 ns | — |
| Internal Frequency | 145 MHz | — |
| Tensión de alimentación | 5.0 V | — |
| I/O Voltage Compatibility | 3.3 V or 5.0 V configurable | — |
| Configuration Memory | EEPROM (non-volatile, in-system programmable) | — |
| JTAG Interface | IEEE 1149.1 (JTAG) boundary scan | — |
| Rango de temperatura de funcionamiento | -40 C to +85 C (industrial) | — |
| Tipo de montaje | Surface Mount | Surface Mount |
| Estado RoHS | RoHS3 Compliant | — |
| Moisture Sensitivity Level | MSL 3 (168 hours) | — |
| Manufacturer Standard Lead Time | 1-7 days (distributor stock) | — |
| Product Type | — | EE PLD (Electrically Erasable Programmable Logic Device) |
| Family | — | MAX 9000 |
| User I/Os (industrial grade) | — | 191 |
| Dedicated Inputs | — | 4 |
| Propagation Delay (tPD) | — | 15 ns (speed grade -15) |
| Internal Frequency (max) | — | 145 MHz |
| Logic Family / Process | — | CMOS, EEPROM-based |
| Core Voltage | — | 5.0 V |
| I/O Voltage | — | 3.3 V or 5.0 V (configurable) |
| Architecture | — | Multiple Array MatriX (MAX), 3rd generation |
| Temperatura de funcionamiento | — | -40 C to +85 C (industrial) |
| In-System Programmability | — | Yes, JTAG (IEEE Std 1149.1) |
| Power-Up Configuration | — | Instant-on (no external boot PROM) |
| I/O Undershoot Tolerance | — | -2.0 V for <20 ns (no-load) |
| I/O Overshoot Tolerance | — | 7.0 V for <20 ns (no-load) |