EPM9560WC208-15C vs EPM9560WC208-20C Comparison
Detailed side-by-side comparison of EPM9560WC208-15C by Altera and EPM9560WC208-20C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Altera
EPM9560WC208-15C
EPM9560WC208-15C - 560-Macrocell EE PLD | Altera MAX 9000
EPM9560WC208-15C NrndAltera
EPM9560WC208-20C
EPM9560WC208-20C - 560-Macrocell EE PLD, 20ns, CQFP-208 | Altera
EPM9560WC208-20C ObsoleteSpecification Comparison
| Parameter | EPM9560WC208-15C | EPM9560WC208-20C |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $178.00 | $140.00 |
| Device Family | MAX 9000 | MAX 9000 (EE PLD) |
| Series | EPM9560 | EPM9560 |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | 35 |
| Flip-Flops | 772 | β |
| User I/O Pins | 149 | 149 |
| Supply Voltage | 3.3 V or 5 V | 3.3 V or 5 V (configurable I/O) |
| Maximum Clock Frequency | 117.6 MHz | [DATA_NEEDED: fMAX value not in verified data] |
| Pin-to-Pin Propagation Delay (tPD) | 16.6 ns | β |
| Process Technology | 0.35 Β΅m CMOS EEPROM | CMOS, Electrically Erasable |
| Package | CQFP-208 (Ceramic Quad Flat Pack) | 208-pin CQFP (Ceramic Quad Flat Pack) |
| Terminal Pitch | 0.50 mm | β |
| Mounting Type | Surface Mount | Surface Mount (Ceramic QFP) |
| Programming Interface | IEEE 1149.1 JTAG | JTAG BST (in-system programmable) |
| Operating Temperature Grade | C (Commercial) | Commercial (C suffix) |
| MultiVolt I/O | Yes (3.3 V / 5 V tolerant) | β |
| RoHS Status | ROHS3 Compliant | ROHS3 Compliant (per fpgalink listing) |
| Moisture Sensitivity Level (MSL) | 3 (168 Hours) | β |
| Propagation Delay (tPD) | β | 20 ns |
| Pin Count | β | 208 |
| Moisture Sensitivity Level | β | MSL 3 (168 Hours) |