EPM9560WC208-20C vs EPM9560RC208-20C Comparison
Detailed side-by-side comparison of EPM9560WC208-20C by Altera and EPM9560RC208-20C by Altera. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560WC208-20C | EPM9560RC208-20C |
|---|---|---|
| Brand | Altera | Altera |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Obsolete | Obsolete |
| Device Family | MAX 9000 (EE PLD) | — |
| Series | EPM9560 | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | — |
| User I/O Pins | 149 | — |
| Propagation Delay (tPD) | 20 ns | 20 ns (speed grade -20) |
| Maximum Clock Frequency | [DATA_NEEDED: fMAX value not in verified data] | — |
| Process Technology | CMOS, Electrically Erasable | — |
| Supply Voltage | 3.3 V or 5 V (configurable I/O) | 5.0 V |
| Package | 208-pin CQFP (Ceramic Quad Flat Pack) | 208-pin RQFP (Power Quad Flat Pack) |
| Pin Count | 208 | — |
| Programming Interface | JTAG BST (in-system programmable) | — |
| Operating Temperature Grade | Commercial (C suffix) | Commercial (0C to +70C) |
| Mounting Type | Surface Mount (Ceramic QFP) | Surface Mount |
| RoHS Status | ROHS3 Compliant (per fpgalink listing) | [DATA_NEEDED: RoHS status] |
| Moisture Sensitivity Level | MSL 3 (168 Hours) | — |
| Family | — | MAX 9000 |
| Device Type | — | EEPROM-based CPLD (EE PLD) |
| Usable Gates | — | 12,000 |
| Flip-Flops | — | 772 |
| Configurable I/O Lines | — | 149 |
| Maximum Frequency | — | 100 MHz |
| I/O Voltage Support | — | 3.3 V or 5 V |
| Configuration Memory | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| JESD-30 Package Code | — | S-PQFP-G208 |
| Terminal Form | — | Gull Wing |
| Technology | — | CMOS |