EPM9560WC208 vs EPM9560RC208-20 Comparison
Detailed side-by-side comparison of EPM9560WC208 by Altera and EPM9560RC208-20 by Intel. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | EPM9560WC208 | EPM9560RC208-20 |
|---|---|---|
| Brand | Altera | Intel |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | NRND | Obsolete |
| Family | MAX 9000 | — |
| Device Type | EE Programmable Logic Device (CPLD) | — |
| Macrocells | 560 | 560 |
| Logic Array Blocks (LABs) | 35 | — |
| Flip-Flops | 772 | 772 |
| Maximum User I/O | 149 | — |
| Maximum Clock Frequency | 117.6 MHz | 100 MHz |
| Propagation Delay (tpd, -15 grade) | 16.6 ns | — |
| Supply Voltage | 3.3 V or 5 V | 5.0 V |
| Process Technology | CMOS, electrically erasable | — |
| Package | 208-pin CQFP (Ceramic Quad Flat Pack) | 208-pin RQFP (28x28 mm) |
| Terminal Pitch | 0.50 mm | — |
| Mounting Type | Surface Mount | Surface Mount |
| Programming Interface | IEEE 1149.1 JTAG | — |
| Configuration Memory | Non-volatile EE (instant-on) | — |
| Hot Socketing Support | Yes | — |
| MSL Level | [DATA_NEEDED: MSL level] | [DATA_NEEDED: MSL level] |
| RoHS Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Device Family | — | MAX 9000 (EPM9560) |
| Usable Gates | — | 12,000 |
| Logic Array Blocks | — | 35 |
| User I/O Pins | — | 153 |
| Pin-to-Pin Delay (tPD) | — | 20 ns |
| Configuration Technology | — | EEPROM (non-volatile) |
| In-System Programmability | — | Yes, via IEEE Std. 1149.1 JTAG |
| Operating Temperature | — | 0C to +70C (commercial) |
| I/O Standards | — | 5.0 V TTL/CMOS compatible |