RTAX2000D-CQ352B vs RTAX2000D-1CQ352E Comparison
Detailed side-by-side comparison of RTAX2000D-CQ352B by Microsemi and RTAX2000D-1CQ352E by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microsemi
RTAX2000D-CQ352B - 2M-Gate Rad-Tolerant FPGA, CQFP-352 | Microchip
RTAX2000D-CQ352B ✓ ActiveMicrochip Technology
RTAX2000D-1CQ352E - 2M-Gate Rad-Tolerant FPGA CQFP352 | Microchip
RTAX2000D-1CQ352E ✓ ActiveSpecification Comparison
| Parameter | RTAX2000D-CQ352B | RTAX2000D-1CQ352E |
|---|---|---|
| Brand | Microsemi | Microchip Technology |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $3,100.00 | $3,650.00 |
| Family | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs | RTAX-S/SL and RTAX-DSP Radiation-Tolerant FPGAs |
| Equivalent System Gates | 2000000 | 2000000 gates |
| Logic Cells | 29568 | — |
| CLBs | 19712 | — |
| Core Supply Voltage | 1.5 V nominal (1.425 V to 1.575 V) | — |
| Process Technology | CMOS antifuse | — |
| Configuration Type | One-time programmable antifuse, live at power-up | — |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Up to 540 kbits with optional EDAC protection |
| Clocking Features | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Package | CQFP-352 ceramic quad flat pack | CQFP352 (352-terminal Ceramic Quad Flat Pack) |
| Screening / Speed Grade | B (burn-in screening); D suffix = tighter ICCA limits at 125C final test | — |
| Mounting Type | Surface Mount | — |
| Application Domain | Space-flight systems | — |
| Radiation Tolerance | Radiation-tolerant (TID/SEE per family datasheet) | — |
| RoHS Status | [DATA_NEEDED: RoHS Status] | — |
| Operating Temperature | [DATA_NEEDED: Operating Temperature Range] | — |
| I/O Supply Voltage | [DATA_NEEDED: I/O Bank Supply Voltage] | — |
| Maximum User I/O | [DATA_NEEDED: Maximum User I/O Count] | — |
| Logic Organization | — | 19712 CLBs |
| Technology | — | Digital CMOS FPGA, antifuse (nonvolatile) |
| Operating Temperature Range | — | -55C to +125C |
| Total Ionizing Dose (Functional) | — | 300 krad |
| Total Ionizing Dose (Rated) | — | 200 krad |
| DSP Mathblocks | — | Up to 120 |
| DSP MAC Performance | — | 125 MHz, 18-bit x 18-bit multiply-accumulate |
| Programmability | — | One-time programmable (antifuse) |
| Supply Voltage | — | [DATA_NEEDED: core/supply voltage] |
| User I/O Terminals | — | [DATA_NEEDED: user I/O count for CQ352] |
| Max System Frequency | — | [DATA_NEEDED: max system frequency] |
| Radiation Environment Target | — | Space-based applications |
| Commercial Prototype Equivalent | — | Axcelerator family device |