RTAX2000SL-1CGS624V vs RTAX2000S-CGS624V Comparison

Detailed side-by-side comparison of RTAX2000SL-1CGS624V by Microsemi and RTAX2000S-CGS624V by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Microchip Technology
RTAX2000S-CGS624V RTAX2000S-CGS624V - 2M-Gate Rad-Tolerant FPGA CG624 | Microchip

RTAX2000S-CGS624V - 2M-Gate Rad-Tolerant FPGA CG624 | Microchip

RTAX2000S-CGS624V ✓ Active

Specification Comparison

Parameter RTAX2000SL-1CGS624V RTAX2000S-CGS624V
Brand Microsemi Microchip Technology
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $0.00
Equivalent System Gates 2000000 2000000
Logic Cells (CLBs) 21504 —
User I/Os (max, package dependent) Up to 684 —
Embedded Memory Up to 540 kbits with optional EDAC Embedded SRAM with built-in FIFO control logic
Total Ionizing Dose (TID) 300 krad (functional), 200 krad (parametric) —
SEU Rate Less than 1E-10 errors per bit-day —
Technology Digital CMOS, antifuse nonvolatile Digital CMOS, anti-fuse OTP
Package 624-ball ceramic CGA (CGS624) CG624 ceramic column grid array
Speed Grade -1 —
Quality / Screening Suffix S (space flow), V suffix qualification level —
Core Supply Voltage [DATA_NEEDED: core supply voltage] —
I/O Supply Voltage [DATA_NEEDED: I/O supply voltage] —
Configuration One-time programmable (OTP), live at power-up, single chip —
Embedded SRAM Features Built-in FIFO control logic —
Clocking Segmentable clocks, chip-wide highway routing Segmentable clocks
Operating Temperature [DATA_NEEDED: operating temperature range] -55C to +125C
Mounting Type Surface Mount Surface Mount
Configurable Logic Blocks (CLBs) — 21504
Logic Cells — 32256
Core Supply Voltage (Nominal) — 1.5 V
Core Supply Voltage Range — 1.425 V to 1.575 V
Family — RTAX-S/SL Radiation-Tolerant FPGA
Configuration Type — One-Time Programmable (anti-fuse), live at power-up
Routing Features — Chip-wide highway routing, carry logic
Application Domain — Space-flight systems
Max Family Density — 4000000 equivalent system gates (family max)

Datasheets & Resources

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