RTAX2000SL-CGS624B vs RTAX2000S-CGS624V Comparison

Detailed side-by-side comparison of RTAX2000SL-CGS624B by Microchip Technology and RTAX2000S-CGS624V by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Microchip Technology
RTAX2000SL-CGS624B RTAX2000SL-CGS624B - 2M-Gate Rad-Tolerant FPGA, 624-CCGA | Microchip

RTAX2000SL-CGS624B - 2M-Gate Rad-Tolerant FPGA, 624-CCGA | Microchip

RTAX2000SL-CGS624B ✓ Active
Microchip Technology
RTAX2000S-CGS624V RTAX2000S-CGS624V - 2M-Gate Rad-Tolerant FPGA CG624 | Microchip

RTAX2000S-CGS624V - 2M-Gate Rad-Tolerant FPGA CG624 | Microchip

RTAX2000S-CGS624V ✓ Active

Specification Comparison

Parameter RTAX2000SL-CGS624B RTAX2000S-CGS624V
Brand Microchip Technology Microchip Technology
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $0.00 $0.00
Family RTAX-S/SL Radiation-Tolerant FPGA RTAX-S/SL Radiation-Tolerant FPGA
Logic Blocks (CLBs) 21504 —
Equivalent System Gates 2000000 2000000
ASIC Gates 250000 —
Maximum Clock Frequency 350 MHz —
Process Technology 0.15 um CMOS —
Supply Voltage 1.5 V —
Programming Technology Anti-fuse (one-time programmable) —
Embedded Memory Embedded SRAM with FIFO control logic Embedded SRAM with built-in FIFO control logic
Package 624-pin Ceramic Column Grid Array (CCGA) CG624 ceramic column grid array
Mounting Type Surface Mount Surface Mount
Radiation Tolerance Radiation-tolerant (space-flight qualified family) —
Operating Temperature [DATA_NEEDED: operating temperature range] -55C to +125C
Number of I/Os [DATA_NEEDED: user I/O count] —
RoHS Status [DATA_NEEDED: RoHS status] —
Qualification QML per Mil Prf 38535 family (DLA cross-reference qualified program) —
Configurable Logic Blocks (CLBs) — 21504
Logic Cells — 32256
Technology — Digital CMOS, anti-fuse OTP
Core Supply Voltage (Nominal) — 1.5 V
Core Supply Voltage Range — 1.425 V to 1.575 V
Configuration Type — One-Time Programmable (anti-fuse), live at power-up
Clocking — Segmentable clocks
Routing Features — Chip-wide highway routing, carry logic
Application Domain — Space-flight systems
Max Family Density — 4000000 equivalent system gates (family max)

Datasheets & Resources

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