RTAX2000SL-CGS624E vs RTAX2000S-1LG624V Comparison
Detailed side-by-side comparison of RTAX2000SL-CGS624E by Microchip Technology and RTAX2000S-1LG624V by Microchip Technology. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Microchip Technology
RTAX2000SL-CGS624E - 2M-Gate Rad-Tolerant FPGA CGA-624 | Microchip
RTAX2000SL-CGS624E ✓ ActiveMicrochip Technology
RTAX2000S-1LG624V - 2M-Gate Rad-Tolerant Antifuse FPGA | Microchip
RTAX2000S-1LG624V ✓ ActiveSpecification Comparison
| Parameter | RTAX2000SL-CGS624E | RTAX2000S-1LG624V |
|---|---|---|
| Brand | Microchip Technology | Microchip Technology |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $0.00 | $0.00 |
| Logic Elements / CLBs | 21504 CLBs | — |
| Equivalent System Gates | 2000000 gates | 2,000,000 gates |
| Additional ASIC Gates | 250000 gates | — |
| Family | RTAX-S/SL Radiation-Tolerant FPGAs | — |
| Technology | CMOS, anti-fuse OTP | — |
| Radiation Tolerance | Radiation-tolerant (space-flight grade) | — |
| Package | CBGA624 / CGA-624 ceramic column grid array | CG624, 624-pin ceramic column grid array |
| Mounting Type | Surface Mount | Surface Mount |
| Configuration | Live at power-up, one-time programmable | Single-chip, live at power-up (no boot device required) |
| Embedded Memory | Embedded SRAM with built-in FIFO control logic | Up to 540 kbits SRAM with optional EDAC protection |
| Clocking | Segmentable clocks, chip-wide highway routing | — |
| Arithmetic Support | Carry logic | — |
| Operating Temperature | [DATA_NEEDED: operating temperature range] | — |
| Supply Voltage | [DATA_NEEDED: core supply voltage] | — |
| Maximum I/O | [DATA_NEEDED: maximum user I/O count for CG624 package] | — |
| RoHS Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Qualification | [DATA_NEEDED: QML qualification level] | — |
| Configurable Logic Blocks (CLBs) | — | 21,504 |
| User I/Os (maximum, family) | — | Up to 684 |
| Total Ionizing Dose (TID), functional | — | 300 krad (Si) |
| Total Ionizing Dose (TID), parametric | — | 200 krad (Si) |
| SEU Immunity | — | Less than 1E-10 errors per bit-day |
| Programming Technology | — | One-time programmable antifuse, nonvolatile |
| Process Technology | — | Digital CMOS |
| Speed Grade | — | -1 |
| Package Temperature Suffix | — | V (space/military screening variant) |
| Family Lineage | — | RTAX-S/SL, based on commercial Axcelerator family |
| Operating Temperature Range | — | [DATA_NEEDED: operating temperature range] |
| Core Supply Voltage | — | [DATA_NEEDED: core supply voltage] |