STM32H757XIH6 vs STM32H755ZIT6 Comparison

Detailed side-by-side comparison of STM32H757XIH6 by STMicroelectronics and STM32H755ZIT6 by STMicroelectronics. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter STM32H757XIH6 STM32H755ZIT6
Brand STMicroelectronics STMicroelectronics
Category Microcontrollers Microcontrollers
Lifecycle Status Active Active
Stock Status In Stock In Stock
Unit Price (USD) $12.18 $16.19
Architecture Arm Cortex-M7 + Cortex-M4 (dual-core, asymmetric multiprocessing) —
Cortex-M7 Max Clock 480 MHz —
Cortex-M4 Max Clock 240 MHz —
Flash Memory 2 MB (dual-bank, read-while-write) 2 MB (dual-bank)
SRAM 1 MB (multiple banks incl. DTCM, AXI SRAM, SRAM1-4, Backup SRAM) 1 MB (DTCM + AXI + SRAM1/2/3)
Supply Voltage (VDD) 1.62 V to 3.6 V —
Package TFBGA-240 (14x14 mm, 0.8 mm pitch) plus 25 additional balls (240+25) LQFP-144 (20x20 mm)
Operating Temperature -40 °C to +85 °C (grade 6) -40 °C to +85 °C (industrial grade)
Communication Interfaces 46 com. and analog interfaces incl. Ethernet, USB, CAN-FD, USART/UART, SPI, I2C, SAI Ethernet, USB OTG HS/FS, 2x CAN FD, 6x SPI, 4x I2C, USART/UART, SDMMC, SAI
Display Interface MIPI-DSI host controller + TFT-LCD controller —
Crypto Accelerator AES, hash (SHA-1/SHA-2), TRNG —
Graphics Accelerator Chrom-ART (2D DMA2D) —
Camera Interface DCMI (parallel, 8- to 14-bit) —
External Memory Controller FMC for SDRAM, NOR, NAND, PSRAM —
Internal SMPS Yes (voltage scaling for core) Yes (step-down for core)
ADCs / DACs Multiple 12-/16-bit ADCs; DAC channels [DATA_NEEDED: exact count] —
Mounting Type Surface Mount (TFBGA) Surface Mount
RoHS Status Compliant Compliant
Core Architecture — Dual-core Arm Cortex-M7 + Cortex-M4
Cortex-M7 Max Frequency — 480 MHz
Cortex-M4 Max Frequency — 240 MHz
GPIO Count — 114
Supply Voltage VDD — 1.62 V to 3.6 V
ADC — 3 x 16-bit, up to 3.6 MSPS
DAC — 2 x 12-bit
Graphics — Chrom-ART Accelerator, LCD-TFT controller, JPEG codec
Crypto Accelerators — AES, SHA, RSA, TRNG
Process Node — 40 nm CMOS
MSL Level — 3 (per JEDEC J-STD-020)

Datasheets & Resources

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