XC3090L-100PC84C vs XC3090L-125PC84C Comparison
Detailed side-by-side comparison of XC3090L-100PC84C by Xilinx and XC3090L-125PC84C by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Xilinx
XC3090L-100PC84C
XC3090L-100PC84C - XC3000 FPGA 6K Gates 100MHz PLCC-84 | Xilinx
XC3090L-100PC84C NrndXilinx
XC3090L-125PC84C
XC3090L-125PC84C - 5K-Gate FPGA, 125MHz, 84-Pin PLCC | Xilinx
XC3090L-125PC84C ObsoleteSpecification Comparison
| Parameter | XC3090L-100PC84C | XC3090L-125PC84C |
|---|---|---|
| Brand | Xilinx | Xilinx |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Nrnd | Obsolete |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $15.20 | $64.00 |
| Family | XC3000 | β |
| Series | XC3090L (Low Power) | XC3000L |
| Logic Cells / CLBs | 320 Configurable Logic Blocks | β |
| Gate Count (typical) | 5,000 to 6,000 gates | β |
| Maximum Operating Frequency | 100 MHz | β |
| Speed Grade | -100 | β |
| Process Technology | CMOS, 5 micron | CMOS, SRAM-based |
| Supply Voltage | 5 V | β |
| Package | 84-pin PLCC (PC84) | 84-pin PLCC (J-lead, package code QCCJ) |
| Package Code | PC84C | β |
| Mounting Type | Through-Hole / Socket (PLCC) | Surface Mount |
| Operating Temperature | Commercial (0C to +70C) | Commercial (0C to +70C) - exact grade [DATA_NEEDED: temperature grade] |
| Boundary Scan | IEEE 1149.1 (JTAG) | β |
| Configuration Method | Xilinx XACT bitstream | β |
| RoHS Status | [DATA_NEEDED: rohs_status] | [DATA_NEEDED: RoHS compliance] |
| MSL Level | [DATA_NEEDED: msl_level] | β |
| Lead Free | [DATA_NEEDED: lead_free] | β |
| Manufacturer | β | Xilinx |
| Product Type | β | Field Programmable Gate Array (FPGA) |
| Logic Family | β | XC3000L Low-Voltage Logic Cell Array |
| Configurable Logic Blocks (CLBs) | β | 320 |
| Equivalent Gates | β | ~5,000 |
| Flip-Flops | β | 928 |
| Maximum Toggle Frequency | β | 125 MHz |
| Supply Voltage (VCC) | β | 3.0 V to 3.6 V (typical 3.3 V) |
| Terminal Form | β | J-BEND (J-lead) |
| Configuration Interface | β | Serial/parallel mode, JTAG (IEEE 1149.1) |