XC3090L-8PC84BKJ vs XC3090LTM-8PC84C Comparison

Detailed side-by-side comparison of XC3090L-8PC84BKJ by Xilinx and XC3090LTM-8PC84C by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter XC3090L-8PC84BKJ XC3090LTM-8PC84C
Brand Xilinx Xilinx
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Family XC3000L Low-Voltage Logic Cell Array XC3000L Low Voltage Logic Cell Array
Logic Cells 320 —
Usable Gates 6,000 —
Configuration Memory 64,160 bits 64,160 bits (distributed SRAM)
Maximum User I/O 144 —
Supply Voltage (Vcc) 3.0 V to 3.6 V (low-voltage) —
Speed Grade -8 (approx. 70 MHz toggle) -8 (per suffix; see device decoder)
Process Technology 5 ns CMOS SRAM 0.8 um CMOS SRAM-based
Configuration Method Serial/parallel SRAM, in-system reconfigurable External EEPROM/EPROM/ROM/master/microprocessor mode
Boundary Scan IEEE 1149.1 (JTAG) compliant —
Package 84-pin PLCC (J-Lead), windowed ceramic (BKJ) 84-Pin Plastic Leaded Chip Carrier (PLCC, J-Lead)
Operating Temperature 0C to +70C (commercial, C suffix) -40 C to +85 C (industrial, TM suffix typically commercial/industrial)
Mounting Type Through-hole (PLCC socket) Surface Mount (PLCC socket-compatible)
MSL Level [DATA_NEEDED: MSL rating] —
RoHS Status unknown - legacy windowed ceramic package unknown
Configuration Pins M0, M1, M2 mode-select + DIN, DOUT, CCLK, INIT —
Logic Cells / Gates — ~6,000 usable gates
Configurable Logic Blocks (CLBs) — 320
Core Supply Voltage — 3.0 V to 3.6 V (3.3 V typical)
Pin Count — 84
Maximum Toggle Frequency — [DATA_NEEDED: specific fmax value]
Logic Block Delays — [DATA_NEEDED: typical TBU/TPIO delay]
I/O Standard Support — TTL/CMOS 3.3 V (5 V tolerant with restrictions)
Lead-Free — unknown
Programming Toolchain — XACT / Foundation (legacy, EOL software)

Datasheets & Resources

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