XC3090L-8PC84BKJ vs XC3090LTM-8PC84C Comparación
Comparación detallada lado a lado de XC3090L-8PC84BKJ por Xilinx y XC3090LTM-8PC84C por Xilinx. Compare las especificaciones clave, los parámetros eléctricos, el encapsulado, el estado del ciclo de vida, los precios y la disponibilidad para determinar el mejor componente para los requisitos de su diseño.
Comparación de especificaciones
| Parámetro | XC3090L-8PC84BKJ | XC3090LTM-8PC84C |
|---|---|---|
| Marca | Xilinx | Xilinx |
| Categoría | FPGA & CPLD | FPGA & CPLD |
| Estado del ciclo de vida | Obsolete | Obsolete |
| Estado del stock | In Stock | In Stock |
| Precio unitario (USD) | $19,20 | $43,25 |
| Family | XC3000L Low-Voltage Logic Cell Array | XC3000L Low Voltage Logic Cell Array |
| Logic Cells | 320 | — |
| Usable Gates | 6,000 | — |
| Configuration Memory | 64,160 bits | 64,160 bits (distributed SRAM) |
| Maximum User I/O | 144 | — |
| Supply Voltage (Vcc) | 3.0 V to 3.6 V (low-voltage) | — |
| Speed Grade | -8 (approx. 70 MHz toggle) | -8 (per suffix; see device decoder) |
| Process Technology | 5 ns CMOS SRAM | 0.8 um CMOS SRAM-based |
| Configuration Method | Serial/parallel SRAM, in-system reconfigurable | External EEPROM/EPROM/ROM/master/microprocessor mode |
| Boundary Scan | IEEE 1149.1 (JTAG) compliant | — |
| Encapsulado | 84-pin PLCC (J-Lead), windowed ceramic (BKJ) | 84-Pin Plastic Leaded Chip Carrier (PLCC, J-Lead) |
| Temperatura de funcionamiento | 0C to +70C (commercial, C suffix) | -40 C to +85 C (industrial, TM suffix typically commercial/industrial) |
| Tipo de montaje | Through-hole (PLCC socket) | Surface Mount (PLCC socket-compatible) |
| Nivel MSL | [DATA_NEEDED: MSL rating] | — |
| Estado RoHS | unknown - legacy windowed ceramic package | unknown |
| Configuration Pins | M0, M1, M2 mode-select + DIN, DOUT, CCLK, INIT | — |
| Logic Cells / Gates | — | ~6,000 usable gates |
| Configurable Logic Blocks (CLBs) | — | 320 |
| Core Supply Voltage | — | 3.0 V to 3.6 V (3.3 V typical) |
| Recuento de pines | — | 84 |
| Maximum Toggle Frequency | — | [DATA_NEEDED: specific fmax value] |
| Logic Block Delays | — | [DATA_NEEDED: typical TBU/TPIO delay] |
| I/O Standard Support | — | TTL/CMOS 3.3 V (5 V tolerant with restrictions) |
| Lead-Free | — | unknown |
| Programming Toolchain | — | XACT / Foundation (legacy, EOL software) |