XC3090LTM-8PC84C - XC3000L FPGA, 6K Gates, 84-PLCC | Xilinx
MPN: XC3090LTM-8PC84C β End of Life| Qty | Unit Price | Extended |
|---|---|---|
| 1 | $65 | $65.00 |
| 10 | $58.5 | $585.00 |
| 100 | $52 | $5,200.00 |
| 500 | $47.5 | $23,750.00 |
| 1,000 | $43.25 | $43,250.00 |
Drop-in alternatives for XC3090LTM-8PC84C β same package, pin-to-pin compatible. Different-package parts requiring PCB rework are excluded.
Quick Comparison Tool β Select alternative parts for side-by-side comparison:
XC3090L-8PC84C
β Drop-Inβ In Stock
$24.95 / Unit
View Datasheet βXC3090LTM-100PC84C
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View Datasheet βXC3090LTM-125PC84C
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$20.85 / Unit
View Datasheet βXC3090L-8PC84I
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$55 / Unit
View Datasheet βXC3090L-8PCG84C
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View Datasheet βXC3090L-8PC84BKJ
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View Datasheet βXC3090LTM-8PC84C Maximum Ratings & Electrical Characteristics
| Family | XC3000L Low Voltage Logic Cell Array |
| Logic Cells / Gates | ~6,000 usable gates |
| Configurable Logic Blocks (CLBs) | 320 |
| Configuration Memory | 64,160 bits (distributed SRAM) |
| Configuration Method | External EEPROM/EPROM/ROM/master/microprocessor mode |
| Core Supply Voltage | 3.0 V to 3.6 V (3.3 V typical) |
| Process Technology | 0.8 um CMOS SRAM-based |
| Package | 84-Pin Plastic Leaded Chip Carrier (PLCC, J-Lead) |
| Pin Count | 84 |
| Mounting Type | Surface Mount (PLCC socket-compatible) |
| Speed Grade | -8 (per suffix; see device decoder) |
| Operating Temperature | -40 C to +85 C (industrial, TM suffix typically commercial/industrial) |
| I/O Standard Support | TTL/CMOS 3.3 V (5 V tolerant with restrictions) |
| RoHS Status | unknown |
| Lead-Free | unknown |
| Programming Toolchain | XACT / Foundation (legacy, EOL software) |
XC3090LTM-8PC84C Pin Configuration
| Pin 1 | I/O β User I/O pin (shared CLB I/O) |
| Pin 2 | I/O β User I/O pin |
| Pin 3 | I/O β User I/O pin |
| Pin 4 | I/O β User I/O pin |
| Pin 5 | I/O β User I/O pin |
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| Pin 7 | I/O β User I/O pin |
| Pin 8 | I/O β User I/O pin |
| Pin 9 | I/O β User I/O pin |
| Pin 10 | I/O β User I/O pin |
| Pin 11 | I/O β User I/O pin |
| Pin 12 | VCC β +3.3V core supply |
| Pin 13 | I/O β User I/O pin |
| Pin 14 | I/O β User I/O pin |
| Pin 15 | I/O β User I/O pin |
| Pin 16 | I/O β User I/O pin |
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| Pin 18 | I/O β User I/O pin |
| Pin 19 | I/O β User I/O pin |
| Pin 20 | I/O β User I/O pin |
| Pin 21 | GND β Ground |
| Pin 22 | I/O β User I/O pin |
| Pin 23 | I/O β User I/O pin |
| Pin 24 | I/O β User I/O pin |
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| Pin 28 | I/O β User I/O pin |
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| Pin 30 | I/O β User I/O pin |
| Pin 31 | I/O β User I/O pin |
| Pin 32 | I/O β User I/O pin |
| Pin 33 | I/O β User I/O pin |
| Pin 34 | I/O β User I/O pin |
| Pin 35 | VCC β +3.3V core supply |
| Pin 36 | I/O β User I/O pin |
| Pin 37 | I/O β User I/O pin |
| Pin 38 | I/O β User I/O pin |
| Pin 39 | I/O β User I/O pin |
| Pin 40 | I/O β User I/O pin |
| Pin 41 | I/O β User I/O pin |
| Pin 42 | GND β Ground |
| Pin 43 | I/O β User I/O pin |
| Pin 44 | I/O β User I/O pin |
| Pin 45 | I/O β User I/O pin |
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| Pin 51 | I/O β User I/O pin |
| Pin 52 | I/O β User I/O pin |
| Pin 53 | I/O β User I/O pin |
| Pin 54 | I/O β User I/O pin |
| Pin 55 | VCC β +3.3V core supply |
| Pin 56 | I/O β User I/O pin |
| Pin 57 | I/O β User I/O pin |
| Pin 58 | I/O β User I/O pin |
| Pin 59 | I/O β User I/O pin |
| Pin 60 | I/O β User I/O pin |
| Pin 61 | I/O β User I/O pin |
| Pin 62 | GND β Ground |
| Pin 63 | I/O β User I/O pin |
| Pin 64 | I/O β User I/O pin |
| Pin 65 | I/O β User I/O pin |
| Pin 66 | I/O β User I/O pin |
| Pin 67 | I/O β User I/O pin |
| Pin 68 | I/O β User I/O pin |
| Pin 69 | I/O β User I/O pin |
| Pin 70 | I/O β User I/O pin |
| Pin 71 | I/O β User I/O pin |
| Pin 72 | I/O β User I/O pin |
| Pin 73 | I/O β User I/O pin |
| Pin 74 | I/O β User I/O pin |
| Pin 75 | VCC β +3.3V core supply |
| Pin 76 | I/O β User I/O pin |
| Pin 77 | I/O β User I/O pin |
| Pin 78 | I/O β User I/O pin |
| Pin 79 | I/O β User I/O pin |
| Pin 80 | I/O β User I/O pin |
| Pin 81 | I/O β User I/O pin |
| Pin 82 | GND β Ground |
| Pin 83 | I/O β User I/O pin |
| Pin 84 | I/O β User I/O pin |
Safe Operating Area (SOA) & Thermal Characteristics
No official SOA curve available for this digital IC. Always operate within absolute maximum ratings specified in the datasheet. Ensure adequate cooling and derate as needed.
Typical Applications
XC3090LTM-8PC84C is suitable for 6 applications: Legacy 3.3V Digital Glue Logic, Prototype ASIC Emulation, Custom Microcontroller Peripheral Interfacing, Industrial Control Subsystem Logic, Legacy Bus Arbitration and Interface Bridging, Low-Volume Production Replacement for EOL ASICs.
Legacy 3.3V Digital Glue Logic
The XC3090LTM-8PC84C fits legacy 3.3V glue-logic applications because the XC3000L 'L' suffix explicitly designates a 3.0V-3.6V core operating range, eliminating the need for 5V-to-3.3V level shifting on every inter-board signal. Its ~6,000 usable gates and 320 CLBs are sufficient to implement address decoding, wait-state generation, custom interrupt controllers, and parallel-bus arbiters that were historically built from 74-series TTL. The 84-PLCC package supports socket-based prototyping, allowing the FPGA to be reprogrammed multiple times during bring-up without reworking the PCB - a key advantage for legacy repair scenarios where documentation may be incomplete.
Recommended
Prototype ASIC Emulation
The XC3090LTM-8PC84C is well-suited to prototype ASIC emulation in low-volume 3.3V designs because the same XC3000L bitstream can be reloaded to iterate logic revisions in minutes, whereas a mask-programmed ASIC requires weeks of fab turnaround. With ~320 CLBs and ~6,000 gates, the device emulates moderate-complexity ASICs such as custom peripheral controllers, DSP front-ends, and serial-protocol engines. The 84-PLCC package is compatible with standard IC sockets, making it ideal for breadboard and evaluation-board emulation where the FPGA may be swapped between design iterations. Engineers can validate functionality, timing, and I/O behavior before committing to mask tooling.
Recommended
Custom Microcontroller Peripheral Interfacing
The XC3090LTM-8PC84C fits custom microcontroller-peripheral interfacing because its ~320 CLBs and 64 configuration-memory bits per CLB deliver enough logic to implement complex state machines, FIFO buffers, and protocol converters between microcontrollers and legacy peripherals. The 3.3V core aligns with modern 3.3V MCUs (ARM7, MSP430, lower-end Cortex-M), eliminating the level-translator circuitry that older 5V FPGAs would require. The 84-PLCC footprint exposes ~64 user I/O pins, sufficient for 8- or 16-bit parallel buses plus handshake and interrupt signals. Engineers building glue-logic adapters between an MCU and legacy parallel or serial peripherals rely on the XC3090L family for its deterministic, hardware-parallel timing.
Recommended
Industrial Control Subsystem Logic
The XC3090LTM-8PC84C fits industrial control subsystem logic because its 3.3V low-voltage operation reduces power dissipation relative to the 5V XC3000 series, an important factor in enclosed industrial cabinets where thermal management is constrained. The XC3090L density (~6,000 gates, 320 CLBs) is sufficient for PLC scan engines, custom motor-control state machines, and encoder-interface logic. The TM suffix indicates a specific speed/temperature combination suitable for industrial environments. The 84-PLCC package is mechanically rugged and socket-compatible for field-replaceable modules, simplifying maintenance in factory-automation installations.
Recommended
Legacy Bus Arbitration and Interface Bridging
The XC3090LTM-8PC84C fits legacy bus-arbitration and interface-bridging applications because its ~6,000-gate capacity is well-matched to multi-master bus controllers, DMA engines, and protocol-converter bridges (e.g., ISA-to-local bus, VME-to-PCI in legacy telecom). The 3.3V core is compatible with 3.3V bus standards while the I/O structure can interface to 5V devices with proper bus-hold or pull-up design. The 84-PLCC footprint is shared with many legacy bus-controller ASICs of the same era, simplifying PCB redesign when migrating from a discontinued ASIC to a soft-logic implementation. Engineers value the deterministic timing of the XC3000L architecture for arbitration circuits.
Recommended
Low-Volume Production Replacement for EOL ASICs
The XC3090LTM-8PC84C is frequently deployed as a low-volume production replacement for end-of-life ASICs because its XC3000L bitstream format is well-documented and its 84-PLCC footprint matches several legacy ASICs from the early 1990s. Designers can reproduce the functionality of a discontinued custom ASIC by porting its gate-level netlist to an XC3000L bitstream, extending the service life of installed equipment (medical instruments, industrial controllers, telecom gear) without requiring PCB redesign. The PLCC socket allows swap-in replacement during field service. This use case dominates the current demand for the XC3090LTM-8PC84C and explains its continued availability on the secondary market despite obsolete status.
Recommended
Recommended Products Summary
Engineering reference data for XC3090LTM-8PC84C β comparison, design guidance, and compliance information.
Selection Guide
Comparison with Alternatives
| Parameter | This Product | XC3090L-8PC84C | XC3090LTM-100PC84C | XC3090LTM-125PC84C | XC3090L-8PC84I | XC3090L-8PCG84C |
|---|---|---|---|---|---|---|
| Package | 84-PLCC (J-Lead) | 84-PLCC (J-Lead) - same | 84-PLCC (J-Lead) - same | 84-PLCC (J-Lead) - same | 84-PLCC (J-Lead) - same | 84-PLCC (J-Lead) - same |
| Brand | Xilinx (now AMD) | Xilinx | Xilinx | Xilinx | Xilinx | Xilinx |
| Family | XC3000L (3.3V) | XC3000L (3.3V) | XC3000L (3.3V) | XC3000L (3.3V) | XC3000L (3.3V) | XC3000L (3.3V) |
| Usable Gates | ~6,000 | ~6,000 | ~6,000 | ~6,000 | ~6,000 | ~6,000 |
| CLBs | 320 | 320 | 320 | 320 | 320 | 320 |
| Core Voltage | 3.3 V (3.0-3.6 V) | 3.3 V (3.0-3.6 V) | 3.3 V (3.0-3.6 V) | 3.3 V (3.0-3.6 V) | 3.3 V (3.0-3.6 V) | 3.3 V (3.0-3.6 V) |
| Speed Grade | -8 (TM suffix) | -8 | -100 (slower) | -125 (slowest) | -8 | -8 |
| Temperature Grade | Commercial/Industrial (TM) | Commercial | Commercial (TM) | Commercial (TM) | Industrial | Commercial |
| Lifecycle Status | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete | Obsolete |
Key Differentiators
- TM suffix indicates specific speed/temperature grade combination (vs XC3090L-8PC84C)
- Pin-compatible with all XC3090L PC84 family variants (vs XC3190A-4PC84C)
- Same-family bitstream format preserves configuration PROM compatibility (vs XC3090A-7PC84C)
Design Notes
Estimated: do not attempt to program the XC3090LTM-8PC84C with modern Vivado, WebPACK, or ISE toolchains - these tools do not support the XC3000L family. Configuration bitstream generation requires the legacy XACT or Foundation software, which is EOL and may require a Windows XP or Windows 2000 virtual machine. Engineers maintaining legacy systems must verify that the original configuration PROM image is preserved before the toolchain environment is decommissioned.
Estimated: at a typical 3.3 V VCC and ~30 mA quiescent current, the XC3090LTM-8PC84C dissipates roughly 0.1 W static power. Under switching conditions with all 64 I/O pins toggling at moderate rates, power can rise to ~0.5 W. Decoupling requires at least one 0.1 uF ceramic capacitor per VCC pin (4 VCC pins on the 84-PLCC) plus a single 10 uF bulk tantalum near the package. Unlike modern FPGAs, the XC3000L family does not require high-frequency decoupling for the internal logic - the 0.1 uF caps primarily support I/O switching transients.
The 84-PLCC package is suitable for both surface-mount and socket-based prototyping. For production boards, use a standard surface-mount PLCC land pattern with J-lead footprint per JEDEC MS-018. For development, use a 84-pin PLCC socket (e.g., 3M Textool or Aries 84-PLCC) - this allows the FPGA to be reprogrammed and swapped without desoldering. Note that the PLCC's J-lead termination is more mechanically robust than fine-pitch QFP leads, but the package is taller than TQFP alternatives.
Estimated: at 0.5 W worst-case power dissipation and a typical PLCC theta_JA of ~50 C/W, the XC3090LTM-8PC84C junction temperature rises ~25 C above ambient at 25 C room temperature - well within the 125 C commercial limit. No heatsink is required. However, in enclosed industrial cabinets with ambient temperatures approaching 70 C, verify that the dissipation stays below 1 W to maintain margin. The PLCC package's plastic body limits maximum ambient to 70 C for reliable operation in commercial grade.
Compliance Information
Compliance status is unknown because the XC3000L family was released before widespread RoHS/REACH adoption and the part is obsolete. The PC84 PLCC package was originally lead-bearing; later production runs may have transitioned but were not formally re-certified. AEC-Q100 is not applicable to legacy FPGAs of this era.
