XC3090LTM-125PC84C vs XC3090LTM-8PC84C Comparison

Detailed side-by-side comparison of XC3090LTM-125PC84C by Xilinx and XC3090LTM-8PC84C by Xilinx. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.

Specification Comparison

Parameter XC3090LTM-125PC84C XC3090LTM-8PC84C
Brand Xilinx Xilinx
Category FPGA & CPLD FPGA & CPLD
Lifecycle Status Obsolete Obsolete
Device Family XC3000L —
Product Type Field Programmable Gate Array (FPGA) —
Equivalent Gates ~5000 gates —
Configurable Logic Blocks (CLBs) 320 320
Flip-Flops 928 —
User I/Os 138 —
Maximum Clock Frequency 125 MHz —
Core Supply Voltage 3.0 V to 3.6 V 3.0 V to 3.6 V (3.3 V typical)
I/O Supply Voltage 4.75 V to 5.25 V —
Package PLCC-84 (PC84) 84-Pin Plastic Leaded Chip Carrier (PLCC, J-Lead)
Mounting Type Surface Mount / Through-Hole Socket Surface Mount (PLCC socket-compatible)
Process Technology CMOS, SRAM-based configuration 0.8 um CMOS SRAM-based
Operating Temperature [DATA_NEEDED: commercial/industrial grade] -40 C to +85 C (industrial, TM suffix typically commercial/industrial)
Configuration Method Serial or parallel bitstream from external PROM External EEPROM/EPROM/ROM/master/microprocessor mode
RoHS Status [DATA_NEEDED: RoHS compliance] unknown
MSL Level [DATA_NEEDED: MSL rating] —
Family — XC3000L Low Voltage Logic Cell Array
Logic Cells / Gates — ~6,000 usable gates
Configuration Memory — 64,160 bits (distributed SRAM)
Pin Count — 84
Speed Grade — -8 (per suffix; see device decoder)
Maximum Toggle Frequency — [DATA_NEEDED: specific fmax value]
Logic Block Delays — [DATA_NEEDED: typical TBU/TPIO delay]
I/O Standard Support — TTL/CMOS 3.3 V (5 V tolerant with restrictions)
Lead-Free — unknown
Programming Toolchain — XACT / Foundation (legacy, EOL software)

Datasheets & Resources

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