XC6SLX9-2TQG144I vs XC6SLX9-2TQG144C Comparison
Detailed side-by-side comparison of XC6SLX9-2TQG144I by AMD and XC6SLX9-2TQG144C by AMD. Compare key specifications, electrical parameters, packaging, lifecycle status, pricing, and availability to determine the best component for your design requirements.
Specification Comparison
| Parameter | XC6SLX9-2TQG144I | XC6SLX9-2TQG144C |
|---|---|---|
| Brand | AMD | AMD |
| Category | FPGA & CPLD | FPGA & CPLD |
| Lifecycle Status | Active | Active |
| Stock Status | In Stock | In Stock |
| Unit Price (USD) | $16.20 | $11.80 |
| Family | Spartan-6 LX | Spartan-6 LX |
| Logic Cells | 9,152 | 9152 |
| Slices / ALMs | 1,430 ALMs (715 CLBs) | — |
| Block RAM | 576 Kbits (72 x 18 Kb) | 64 Kbit per block (16 blocks) |
| DSP Slices | 16 (DSP48A1) | DSP48A1 |
| Maximum User I/O | 102 | — |
| Package | 144-pin TQFP (TQG144), 20 x 20 mm, 0.5 mm pitch | TQFP-144 (TQG144), 20 x 20 mm, 0.5 mm pitch |
| Speed Grade | -2 (mid-range) | — |
| Operating Temperature | -40C to +100C (Industrial) | 0C to +85C (commercial, C grade) |
| Core Voltage (VCCINT) | 1.2 V | 1.14 V to 1.26 V |
| I/O Bank Voltage (VCCO) | 1.2 V to 3.3 V | — |
| Process Technology | 45 nm low-power CMOS (9-metal copper) | 45 nm CMOS, 9-metal layer copper |
| Memory Interfaces | DDR, DDR2, DDR3, LPDDR (via Memory Controller Block) | — |
| Clock Management | DCM + PLL per tile | DCM + PLL |
| Mounting Type | Surface Mount | Surface Mount |
| MSL Level | 3 (per JEDEC J-STD-020) | — |
| RoHS Status | RoHS Compliant (Lead Free) | Compliant |
| System Gates | — | 589824 |
| Configurable Logic Blocks (CLBs) | — | 715 |
| User I/O Count | — | 102 |
| Operating Frequency (max) | — | 375 MHz |
| Lead-Free Status | — | Lead Free |