10AS057H1F34E1HG vs 10AS048H2F34E1HG Vergleich
Detaillierter Direktvergleich von 10AS057H1F34E1HG von Intel und 10AS048H2F34E1HG von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 10AS057H1F34E1HG | 10AS048H2F34E1HG |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $3.300,00 | $3.650,00 |
| Family | Arria 10 SX | Arria 10 SX SoC FPGA |
| Series | 10AS057 | — |
| Logic Elements | 570 K | 480K |
| Hard Processor System | Dual-core ARM Cortex-A9 MPCore with CoreSight | Dual ARM Cortex-A9 MPCore with CoreSight |
| Maximum HPS Core Frequency | 1.5 GHz | — |
| Gehäuse | 1152-FBGA, FC (35x35 mm) | 1152-ball FCBGA (F34), 35x35 mm |
| Pin/Ball Count | 1152 | — |
| I/O Count | 492 user I/O | — |
| Process Technology | 20 nm | — |
| Transceiver Data Rate (max) | 17.7 Gbps | — |
| Embedded Memory | [DATA_NEEDED: total Mbits] | — |
| DSP Blocks | [DATA_NEEDED: count] | Variable-precision DSP (family-level) |
| Memory Controller | Hard DDR3/DDR4 controller in HPS and FPGA fabric | — |
| PCIe Hard IP | PCIe Gen2/Gen3 x1/x2/x4 | Gen2/Gen3 capable (family-level) |
| Betriebstemperatur | -40C to +100C (industrial) | Extended (per OPN E1 suffix, family-level) |
| Montageart | Surface Mount (FCBGA) | Surface Mount (BGA) |
| RoHS-Status | Compliant | Compliant (per distributor listing) |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | [DATA_NEEDED: MSL level] | — |
| HPS Maximum Frequency | — | 1.5 GHz |
| Speed Grade | — | H2 |
| Transceivers | — | Multi-gigabit (14.1 Gbps-capable, family-level) |
| On-chip Memory | — | M20K blocks plus MLAB (family-level) |
| Memory Interface | — | DDR3/DDR4 hard memory controllers (family-level) |
| Configuration Device | — | Supported (family-level, external or internal) |