10M16SCE144A7G vs 10M16SCE144I7G Vergleich
Detaillierter Direktvergleich von 10M16SCE144A7G von Altera und 10M16SCE144I7G von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 10M16SCE144A7G | 10M16SCE144I7G |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $24,50 | $34,85 |
| Series | MAX 10 | — |
| Family | MAX 10 FPGA | MAX 10 |
| Logic Elements (LE) | 16,000 | 16,000 |
| Embedded Memory (Kb) | 562 Kb | — |
| Maximum User I/O | 101 | — |
| Logic Array Blocks (LABs) | 1000 | — |
| Embedded 18x18 Multipliers | 45 | — |
| Supply Variant | Single-supply (S) | — |
| Speed Grade | -A7 | — |
| Temperature Grade | Automotive (-A7: -40C to +125C) | — |
| Gehäuse | 144-LQFP Exposed Pad (EQFP-144), 22 x 22 mm, 0.5 mm pitch | 144-LQFP Exposed Pad (EQFP-144, 22x22 mm, 0.5 mm pitch) |
| Montageart | Surface Mount | Surface Mount |
| Maximum Operating Frequency | 450 MHz | — |
| Betriebsversorgungsspannung | 3.0 V / 3.3 V | — |
| Process Node | 55 nm embedded flash (TSMC) | — |
| Configuration Memory | On-die non-volatile flash | On-chip dual-configuration flash (instant-on) |
| RoHS-Status | Compliant | RoHS Compliant |
| MSL-Level | Moisture Sensitive (per distributor data) | — |
| Factory Pack Quantity | 60 | — |
| Tradename | MAX | — |
| Embedded Memory (bits) | — | 562,176 |
| User I/O Pins | — | 101 |
| Process Technology | — | 55 nm CMOS, non-volatile (on-chip flash) |
| Core Voltage | — | 1.0 V (internal regulator from 3.3 V/2.5 V supply) |
| Supply Voltage Range | — | 2.85 V to 3.465 V (single 3.3 V supply supported) |
| Operating Temperature Grade | — | I7G (Industrial, -40 C to +100 C junction) |
| Embedded SRAM Blocks | — | M9K (9 Kbit blocks) |
| DSP Blocks | — | Yes (18x18 multipliers) |
| Hardened ADC | — | 12-bit SAR, up to 1 MSPS, 17 channels |
| PLL Count | — | [DATA_NEEDED: PLL count for 10M16 device] |
| I/O Banks | — | [DATA_NEEDED: I/O bank count] |
| Global Clock Networks | — | [DATA_NEEDED: global clock network count] |