5CSEBA2U19C6N vs 5CSEBA2U19C7SN Vergleich
Detaillierter Direktvergleich von 5CSEBA2U19C6N von Intel und 5CSEBA2U19C7SN von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5CSEBA2U19C6N | 5CSEBA2U19C7SN |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $74,60 | $40,33 |
| Family | Cyclone V SE SoC FPGA | Cyclone V SE FPGA SoC |
| Logic Elements | 25 K | 25,000 |
| Hard Processor System | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Clock Frequency | 925 MHz | — |
| DSP Blocks | Variable-precision DSP | Variable-precision DSP |
| Gehäuse | 484-pin UBGA (19x19 mm) | 484-UBGA (19x19 mm) |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Operating Temperature Grade | Commercial (other) | — |
| Memory Interfaces | DDR2, DDR3, LPDDR2 with ECC | — |
| HPS Peripherals | GbE, USB 2.0 OTG, SATA, CAN, UART, SPI, I2C, SD/SDIO/MMC | — |
| L2 Cache | 512 KB shared | — |
| L1 Cache per Core | 32 KB I-cache + 32 KB D-cache | — |
| FPGA-to-HPS Bridges | AXI-32/AXI-64, FPGA-to-SDRAM ports | — |
| Process Technology | TSMC 28 nm low-power | TSMC 28 nm low-power |
| RoHS-Status | Compliant | Compliant |
| Device Variant | — | 5CSEA2 (single-core ARM Cortex-A9) |
| Processor Hard Core | — | Single ARM Cortex-A9 MPCore with CoreSight |
| Maximum Processor Frequency | — | 800 MHz |
| User I/O Count | — | 161 (5CSEBA2 variant) |
| Speed Grade | — | C7 (commercial) |
| Betriebstemperatur | — | 0C to +85C (commercial, C7 suffix) |
| Memory Blocks | — | M10K + MLAB embedded RAM |
| HPS Memory Controller | — | DDR2, DDR3, LPDDR2, LPDDR |
| MSL-Level | — | 3 (per JEDEC J-STD-020) |