5CSEBA4U19I7SN vs 5CSEBA5U19I7SN Vergleich

Detaillierter Direktvergleich von 5CSEBA4U19I7SN von Intel und 5CSEBA5U19I7SN von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter 5CSEBA4U19I7SN 5CSEBA5U19I7SN
Marke Intel Altera
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $145,00 $118,40
Series Cyclone V SE SoC FPGA —
Device Family Cyclone V —
Logic Elements 40,000 85K
Hard Processor System (HPS) Single ARM Cortex-A9 MPCore with CoreSight —
HPS Maximum Frequency 800 MHz —
Gehäuse 484-pin UBG A (19x19 mm) 484-pin UBG (Ultra FineLine BGA, 19x19 mm)
Montageart Surface Mount Surface Mount (BGA)
Betriebstemperatur -40C to +100C (Industrial) —
Process Node 28 nm low-power —
Supply Voltage (Core) 1.1 V (typical) —
I/O Standards Supported LVTTL, LVCMOS, LVDS, SSTL, HSTL (Cyclone V I/O family) —
Embedded Memory [DATA_NEEDED: total Kbits of M9K blocks] [DATA_NEEDED: total Kbits]
18x18 Hardware Multipliers [DATA_NEEDED: count] —
PLLs [DATA_NEEDED: count] —
Transceivers Not applicable (SE family, transceiver-less) [DATA_NEEDED: transceiver count for 5CSEA5 U19]
PCI Express Hard IP Gen1 capable (rootport/endpoint) —
DDR Memory Support DDR2/DDR3/LPDDR2 via HPS and FPGA fabric —
RoHS-Status Compliant Compliant
Family — Cyclone V SE SoC FPGA
Device Variant — 5CSEA5
Hard Processor System — Single-core ARM Cortex-A9 MPCore with CoreSight
HPS Maximum Clock — 800 MHz
FPGA Fabric Maximum Clock — [DATA_NEEDED: maximum fabric frequency]
Package Designator — U19
Speed/Logic Grade — A5 (mid-tier speed grade)
User I/O Count — 66 (per distributor listing); up to 288 in Cyclone V SE family typical
DSP Blocks — [DATA_NEEDED: DSP block count for 5CSEA5]
PLL Count — [DATA_NEEDED: PLL count for 5CSEA5]
Betriebs-Sperrschichttemperatur — -40C to +100C (industrial)
Process Technology — TSMC 28 nm low-power
Configuration — SRAM-based, volatile
MSL-Level — [DATA_NEEDED: moisture sensitivity level]

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