5CSEBA6U19I7NTS vs 5CSEBA6U19I7N Vergleich
Detaillierter Direktvergleich von 5CSEBA6U19I7NTS von Intel und 5CSEBA6U19I7N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
5CSEBA6U19I7NTS - Cyclone V SE SoC FPGA, 110K LE, 925MHz, 484-UBGA | Intel
5CSEBA6U19I7NTS ✓ AktivIntel
5CSEBA6U19I7N - Cyclone V SE SoC FPGA, 110K LE, Dual ARM Cortex-A9 800MHz | Intel
5CSEBA6U19I7N ✓ AktivSpezifikationsvergleich
| Parameter | 5CSEBA6U19I7NTS | 5CSEBA6U19I7N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $46,25 | $142,75 |
| Product Type | System-on-Chip FPGA (SoC FPGA) | — |
| Series | Cyclone V SE | 5CSEBA6 |
| Logic Elements | 110K | 110,000 |
| HPS Core | Dual ARM Cortex-A9 MPCore with CoreSight | — |
| HPS Maximum Frequency | 925 MHz | 800 MHz |
| FPGA Architecture | Cyclone V SE, 28 nm low-power process | — |
| Gehäuse | 484-ball UBGA (19x19 mm) | 484-pin UBGAFBGA (UBGA-484, 19x19 mm) |
| Betriebstemperatur | -40C to +100C (Industrial, 'I7' speed grade) | -40C to +100C (Industrial) |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| MSL-Level | [DATA_NEEDED: MSL rating] | — |
| RoHS-Status | Compliant | Compliant |
| Lead-Free | Yes | — |
| Configuration Method | SRAM-based, via Quartus Prime | — |
| DSP Blocks | [DATA_NEEDED: DSP block count] | 112 (18x18 multipliers) |
| Speichertyp | DDR3/DDR3L with ECC support | — |
| HPS Peripherals | Gigabit Ethernet, USB 2.0 OTG, CAN, SPI, I2C, UART | — |
| Device Family | Cyclone V | — |
| Family Variant | SE (SoC FPGA with HPS) | — |
| Family | — | Cyclone V SE SoC FPGA |
| Device Variant | — | 5CSEA6 (U19 package, 110K LE) |
| Hard Processor System | — | Dual-core ARM Cortex-A9 MPCore |
| Embedded Memory | — | 4.45 Mbits (M10K + MLAB) |
| Hard Memory Controller | — | DDR3, DDR3L, LPDDR2 |
| Transceivers | — | Up to 9 channels, 3.125 Gbps |
| PLLs | — | 6 (FPGA) + 3 (HPS) |
| User I/O Banks | — | 8 |
| Maximum User I/O | — | 288 (package-dependent) |
| Process Technology | — | TSMC 28 nm low-power |
| Versorgungsspannung | — | Multi-rail (1.1 V core, 1.5/1.8/2.5/3.0/3.3 V I/O) |
| Configuration Modes | — | JTAG, Active Serial (AS), Passive Serial (PS), Fast Passive Parallel (FPP) |