5M160ZE64A5N vs 5M160ZM68A5N Vergleich
Detaillierter Direktvergleich von 5M160ZE64A5N von Altera und 5M160ZM68A5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5M160ZE64A5N | 5M160ZM68A5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $6,20 | $5,10 |
| Family | MAX V | MAX V |
| Device | 5M160ZE64A5N | — |
| Macro Cells | 128 | — |
| Logic Elements | 160 | — |
| User I/O Pins | 54 | — |
| Maximum Operating Frequency | 118.3 MHz | — |
| Pin-to-Pin Propagation Delay | 7.5 ns | — |
| User Flash Memory | 8 Kbits | 8 Kbits |
| Core Voltage (VCCINT) | 1.8 V (1.71 V to 1.89 V) | — |
| I/O Voltage Support | 1.5 V, 1.8 V, 2.5 V, 3.3 V | — |
| Gehäuse | 64-pin EQFP (exposed-pad QFP) | 68-ball FBGA (FineLine BGA), 0.5 mm pitch |
| Betriebstemperatur | -40C to +125C (automotive AEC-Q100) | -40C to +125C (industrial) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | IEEE Std 1149.1 JTAG BST |
| Configuration Method | Non-volatile flash, instant-on | — |
| RoHS-Status | Compliant | Compliant |
| Montageart | Surface Mount | Surface Mount (BGA) |
| Device Variant | — | 5M160Z (128 macrocells, 1.8 V, speed grade -7) |
| Macrocells | — | 128 |
| Logic Array Blocks (LABs) | — | 4 |
| User I/Os | — | 52 |
| Propagation Delay (tPD) | — | 14 ns |
| Standby Current (ICCSTBY) | — | 25 uA (typical) |
| Core Supply Voltage (VCCINT) | — | 1.8 V (1.71 V to 1.89 V) |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| JEDEC Package Code | — | S-PBGA-B68 |
| Automotive Qualification | — | AEC-Q100 |