5M240ZT100I5N vs 5M160ZE64I5N Vergleich

Detaillierter Direktvergleich von 5M240ZT100I5N von Altera und 5M160ZE64I5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter 5M240ZT100I5N 5M160ZE64I5N
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $4,81 $4,13
Family MAX V —
Series 5M240Z —
Device Type CPLD (Complex Programmable Logic Device) —
Logic Elements 240 —
Macrocells 192 128
User Flash Memory 8 Kbit 4.0 Kbits
Maximum User I/O 114 —
User I/O Pins (per datasheet) 79 —
Anzahl der Pins 100 —
Package Type TQFP-100 (T100) —
Package Body Size 14 x 14 mm —
Lead Pitch 0.50 mm —
Core Voltage (VCCINT) 1.8 V —
I/O Bank Voltage (VCCIO) 1.2 V to 3.3 V (bank-dependent) —
Speed Grade -5 —
Maximum Internal Frequency 118.3 MHz —
Pin-to-Pin Delay (tPD1) 7.5 ns (per datasheet header) —
Betriebstemperatur -40 C to +100 C (Industrial) -40C to +100C (Industrial)
Programming Interface JTAG (IEEE 1149.1) / ISP —
Configuration Memory Non-volatile flash (instant-on) —
Montageart Surface Mount Surface Mount
Lead-Free / RoHS Yes (LEAD FREE per datasheet header) —
MSL-Level [DATA_NEEDED: MSL Level] —
AEC-Q100 Automotive Not qualified (Industrial grade) —
Device Family — MAX V
Logic Elements (LEs) — 160
Maximum User I/O Pins — 79
Pin-to-Pin Logic Delay (tPD) — 7.5 ns
Logic Array Blocks (LABs) — 4
Supply Voltage - Core — 3.3 V or 2.5 V
I/O Bank Voltages — 1.5 V / 1.8 V / 2.5 V / 3.3 V
Gehäuse — 64-pin EQFP (Exposed Pad)
JTAG Support — Yes (IEEE 1149.1, TMS/TDI/TDO/TCK)
Differential I/O — LVDS, RSDS, mini-LVDS, LVPECL (emulated)
Configuration — Non-volatile on-chip flash, instant-on
RoHS-Status — Compliant

Datenblätter & Ressourcen

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