5M240ZT100I5N vs 5M80ZT100I5N Vergleich

Detaillierter Direktvergleich von 5M240ZT100I5N von Altera und 5M80ZT100I5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter 5M240ZT100I5N 5M80ZT100I5N
Marke Altera Intel
Kategorie FPGA & CPLD FPGA & CPLD
Lebenszyklusstatus Aktiv Aktiv
Lagerstatus In Stock In Stock
Stückpreis (USD) $4,81 $7,37
Family MAX V MAX V CPLD
Series 5M240Z —
Device Type CPLD (Complex Programmable Logic Device) —
Logic Elements 240 —
Macrocells 192 —
User Flash Memory 8 Kbit —
Maximum User I/O 114 —
User I/O Pins (per datasheet) 79 —
Anzahl der Pins 100 —
Package Type TQFP-100 (T100) —
Package Body Size 14 x 14 mm —
Lead Pitch 0.50 mm —
Core Voltage (VCCINT) 1.8 V —
I/O Bank Voltage (VCCIO) 1.2 V to 3.3 V (bank-dependent) —
Speed Grade -5 —
Maximum Internal Frequency 118.3 MHz —
Pin-to-Pin Delay (tPD1) 7.5 ns (per datasheet header) —
Betriebstemperatur -40 C to +100 C (Industrial) —
Programming Interface JTAG (IEEE 1149.1) / ISP —
Configuration Memory Non-volatile flash (instant-on) Internal non-volatile flash (instant-on)
Montageart Surface Mount Surface Mount
Lead-Free / RoHS Yes (LEAD FREE per datasheet header) —
MSL-Level [DATA_NEEDED: MSL Level] MSL3 (per JEDEC J-STD-020)
AEC-Q100 Automotive Not qualified (Industrial grade) —
Logic Elements (LE) — 80
Macrocells (approx.) — 160
User I/O Pins — 64
Gehäuse — TQFP-100 (100 pins, 0.5 mm pitch)
Pin-to-Pin Logic Delay (tPD) — 7.5 ns
Core Supply Voltage (VCCINT) — 1.71 V to 1.89 V (1.8 V typical)
I/O Supply Voltage (VCCIO) — 1.2 V / 1.5 V / 1.8 V / 2.5 V / 3.3 V
Operating Temperature (Industrial) — -40 °C to +100 °C
UFM (User Flash Memory) — Up to 8 Kbits user-accessible
JTAG / ISP — IEEE 1149.1 boundary-scan + in-system programming
RoHS-Status — Compliant

Datenblätter & Ressourcen

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