5M40ZE64C4N vs 5M80ZE64C4N Vergleich
Detaillierter Direktvergleich von 5M40ZE64C4N von Intel und 5M80ZE64C4N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | 5M40ZE64C4N | 5M80ZE64C4N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $1,70 | $2,10 |
| Family | MAX V | MAX V |
| Logic Elements (LE) | 32 | — |
| User Flash Memory | 4 Kbit | On-chip (8 Kbits) |
| Pin-to-Pin Delay (tPD1) | 7.5 ns | — |
| Maximum Internal Frequency | 184 MHz | — |
| Number of I/O Pins | 30 (approx.) | — |
| Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Bank Voltage | 1.8 V / 2.5 V / 3.3 V | — |
| Process Technology | 0.18 µm flash-based CMOS | — |
| Configuration Memory | Non-volatile flash (internal) | Non-volatile flash, instant-on |
| Programmable Pull-up Resistors | Yes (per-pin, internal) | — |
| Programming Interface | JTAG (IEEE 1149.1) | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | — |
| Gehäuse | EQFP-64 (Plastic Enhanced QFP, 64 pins) | 64-pin EQFP (E64) with exposed pad |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | 3 (per JEDEC J-STD-020) | [DATA_NEEDED: MSL level] |
| RoHS-Status | Compliant | Compliant (lead-free) |
| Device Logic Elements | — | 64 |
| Number of Macro Cells | — | 64 |
| Number of Logic Array Blocks (LABs) | — | 4 |
| Maximum User I/O Pins | — | 79 |
| Maximum Operating Frequency | — | 184.1 MHz |
| Propagation Delay (tPD) | — | [DATA_NEEDED: tPD in ns] |
| Core Voltage (VCCINT) | — | 1.8 V |
| I/O Voltage (VCCIO) | — | 1.5V / 1.8V / 2.5V / 3.3V |
| Programmability | — | In-system via JTAG (IEEE 1149.1) |
| Global Clocks | — | 2 |
| Operating Temperature Grade | — | Commercial (0C to +85C) |
| Speed Grade | — | C4 |
| Hot Socketing | — | Supported |